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Thesis Defence of Shamibrota Kishore Roy @3.30pm

August 16, 2022 @ 3:30 pm - 5:00 pm UTC+0

Title: Characterization and Modelling of Switching Dynamics of SiC MOSFETs

Name of the Student: Shamibrota Kishore Roy

Name of the Advisor: Dr Kaushik Basu

Degree Registered: PhD

Date and Time: 16 August 2022, 03:30 PM (IST) 

Place: MMCR EE

Meeting Link: Click here to join the meeting

Abstract: Silicon Carbide MOSFETs (SiC MOSFETs) fall into the class of wide band gap (WBG) power devices. These devices are commercially available in the voltage range of 600-3300V and are superior to the state-of-the-art Si insulated gate bipolar junction transistors (IGBTs) due to their better electrical and thermal performances.

In power electronic converters, semiconductor devices operate as switches. They can be turned on or off using a control signal. Unlike ideal switches, practical devices require a finite amount of time to transit between on and off states. This is termed switching transient. Non-zero finite product of voltage and current during switching transient results in switching loss. Characterization and modelling of switching dynamics help gain insight into the switching process and estimate switching loss. It is useful over experimental measurement techniques like double pulse test (DPT) or calorimetric measurements in the early stages of power converter design. Estimated loss through the switching transient model can be used to determine switching frequency and selection of power devices. Also, switching dynamics is strongly impacted by the device and circuit parasitic. Insight into the switching process helps in the proper design of gate driver and power circuit layout. Superior material properties of SiC MOSFET lead to a smaller die size compared to the state-of-the-art Si-based power devices. It results in faster switching transients and lower switching loss. However, it excites device and circuit parasitic that may lead to prolonged oscillation, high device stress, spurious turn-on and EMI-related issues Etc. So, the benefit of using SiC MOSFET as power devices come with numerous design challenges resulting in slow commercial adaptation. It is predicted that the overall market share of WBG devices (SiC and GaN together) will be roughly 10% of the total market for power semiconductors by 2025.

To overcome the design challenges and fully utilize the benefits of fast switching SiC MOSFETs, a better understanding of dynamics is essential. However, the switching dynamics of SiC MOSFET is different compared to its Si counterpart. This is due to the highly non-linear device characteristics. Also, the fast-switching transient of SiC MOSFET excites the circuit parasitic and makes the switching dynamics highly involved. This work focuses on the characterization and modelling of switching transient of SiC MOSFET. Simulation and analytical modelling approaches are used to model the switching dynamics and estimate switching loss. The behavioral modelling approach is a widely used simulation-based approach (i.e., Spice simulation) and it can capture the switching transient with sufficient accuracy. This approach uses lumped parameter model (circuit model) of the device and external circuit and can be simulated in a circuit simulator like MATLAB/Simulink. This implies the numerical solution of a set of coupled non-linear differential equations. On the other hand, the analytical modelling approach is based on the simplified approximate solution of a set of coupled non-linear differential equations obtained from the behavioral model. In order to obtain the approximate solution, the entire switching process is divided into different modes with clearly defined transition conditions. Different approximations are used in each mode to arrive at analytical closed-form solutions or reduced order coupled non-linear differential equations. This model is computationally efficient and can be implemented easily in freely available programming platforms such as C or Python. Also, the parameters required for analytical models can be obtained from the device datasheet. This modelling approach is beneficial for the converter design when switching loss and junction temperature need to be evaluated over several operating points for many available devices from different manufacturers.

In the first part of the work, a behavioral model is developed to capture the switching transient of SiC MOSFET. It considers the detailed channel current model and captures the gradual transition effect from ohmic to saturation region. A piecewise non-linear model of gate-drain capacitance is used and a comprehensive non-linear model of drain-source and diode capacitances is considered. Also, the effect of the circuit parasitic are taken into account. A double pulse test (DPT) based experimental measurement is used for validation.

In the next part, analytical models to capture the switching dynamics (hard turn on and off) of SiC MOSFET are proposed. These models are based on the behavioral model developed in the first part of the work. In the existing literature, simplified modelling of channel current and device capacitances was used, resulting in underestimation of switching transition time and loss. On the contrary, the proposed approach considers the detailed non-linear model of channel current and device capacitances along with circuit parasitic. It accurately estimates transition time, switching loss, (dv=dt), (di=dt), and transient over-voltage. Double pulse test (DPT) based experimental measurement and behavioral simulations are used for validation.

In soft switched converters (i.e., DAB), hard turn-on is avoided by the converter operation, and the switching loss is solely dictated by the turn-off loss. The addition of external capacitance across the device prolongs the voltage rise period and reduces overlap between voltage and current during turn-off transient. This is termed zero voltage switching (ZVS). However, the selection of external capacitance is not straightforward. A large external capacitance reduces switching loss, (dv/dt), (di/dt), and transient over-voltage but may also result in higher dead-time loss and reduced switching frequency. Also, this may lead to partial soft switching for light load conditions if the dead-time is not sufficient. In this work, an analytical model to capture capacitor-assisted turn-off switching transient is also presented where the detailed non-linear modelling of the SiC MOSFET is used. This leads to a better estimation of switching transition time, actual loss, (dv/dt), (di/dt), and transient overvoltage. Also, a step-by-step design procedure for the optimal external snubber capacitor was proposed. It ensures the soft-switching condition is satisfied, and the maximum (dv/dt) rate is within a predefined limit for a specified DC bus voltage and range of load currents. This procedure also helps in the selection of proper dead-time to avoid partial soft-switching conditions. Double pulse test (DPT) based experimental measurement and behavioral simulations are used to validate the analytical model.

The fast switching transient of SiC MOSFET is significantly impacted by circuit parasitic. Circuit parasitic inductances are dependent on both device package (device lead, wire bond etc.) and circuit layout (PCB layout), whereas circuit parasitic capacitances are contributed solely by the circuit layout. Proposed switching transient models require circuit parasitic as input, and the values are not usually available in the device datasheet. Measurement is the only way to accurately estimate some device package-dependent circuit parasitic when the internal package geometry is unknown. In this context, a set of simple measurement techniques are proposed to determine important circuit parasitic necessary for switching dynamics study. The accuracy of the proposed technique is verified through behavioral simulation, and experimental results of the hard turn off and capacitor assisted soft turn off dynamics of SiC MOSFET over a range of operating conditions for two 1.2-kV discrete SiC MOSFET of different current ratings and two different PCB layouts. Measured circuit parasitic when used in switching transient model, correctly predicted both hard turn-off and capacitor assisted soft turn off switching dynamics over a wide range of operating conditions.

An interactive software based on the proposed analytical model is also developed in Python environment. The developed software takes device parameters and circuit parasitic as input and estimates transition time, switching loss, (dv/dt), (di/dt) and transient over-voltage as a function of load current.

ALL ARE CORDIALLY INVITED

Details

Date:
August 16, 2022
Time:
3:30 pm - 5:00 pm UTC+0

Venue

EE, MMCR