Thesis Defence of Mr. Paawan Kirankumar Dubal

Thesis Title: Cyber Attack Resilient Breaker Failure Protection Scheme Using Wide Area measurements

Name of the Advisor: Prof. Sarasij Das

Degree Registered: M.Tech-Research

Date and Time: 6^th October, 2022, 3:00 PM IST Online

Meeting Link: https://teams.microsoft.com/l/meetup-join/19%3ameeting_ZWZkYzViOWQtNWIzYi00MWQ1LWE1ZTMtNzcwOTUxM2JkNGM0%40thread.v2/0?context=%7b%22Tid%22%3a%226f15cd97-f6a7-41e3-b2c5-ad4193976476%22%2c%22Oid%22%3a%2240bc61c0-cc62-49a2-80af-a06745a651ac%22%7d

Abstract: Breaker Failure Protection (BFP) is a backup protection that comes into play when a circuit breaker fails to isolate the fault. If the circuit breaker fails to clear the fault, the BFP scheme commands other required breakers to isolate the fault. BFP schemes are usually incorporated in microprocessor-based digital relays. Commonly employed BFP schemes use overcurrent element (50BF) and Breaker Failure Initiation (BFI) signals as inputs. The BFI signal is issued to the BFP relays from other digital relays. Line current sensed via current transformer is fed to the BFP relay for the overcurrent element (50BF). When both 50BF and BFI are high, it waits for a specified time for the primary protection to operate. The 50BF element is usually set much lower than the rated load currents. So, it will be high during the normal loading conditions. A cyber-attack can be launched by issuing false BFI or blocking a legitimate BFI signal to the BFP relay. Operation of BFP scheme usually leads to disconnection of a larger amount of loads. As a result, mal-operation of BFP schemes can cause major disturbances in power systems. There is a need to make the BFP schemes resilient to cyber-attacks for reliable operation of power systems. Currently, there is a lack of literature on the cyber-attack resilient BFP schemes.

Hence, this thesis proposes a Wide-Area Measurement-Based Cyber-Resilient Breaker Failure Protection Scheme. The scope of the work is to develop an algorithm that will ascertain if the BFI received by the BFP relay is genuine. Blocking a legitimate BFI will cause the backup protection to operate and clear the fault. The proposition assumes that the BFP relay is not compromised in any manner. However, a fake BFI can be issued by other digital relays, which may cause unwanted BFP operations. In the proposed algorithm, when the BFI is received. The BFP relay will communicate the receipt of BFI to the Phasor Data Concentrator (PDC). The proposed algorithm will run at the PDC, which has access to the time-stamped measurements of the adjacent substations and the substation that triggered the algorithm. The decision of the proposed algorithm is communicated back to the BFP relay, which will allow the tripping if the BFI is genuine. Hence, we also propose modifications in the BF scheme in the BFP relay to incorporate the algorithm’s decision in issuing the final trip. The proposal running at PDC is a two-layer algorithm. The first layer randomly samples the bus voltages at the adjacent substations considering different groups of digital relays. The relay which has issued the BFI may be compromised. It makes relays of the same make and family more susceptible to a cyber-attack exploiting the same vulnerabilities. Hence we propose grouping of relays by their make and relay families. The first layer is meant to determine if there is a fault in the vicinity of the BFP relay that issued the trigger. The second layer provides discrimination between fault and cyber-attack by measuring the impedance observed at the two ends of the perceived-faulted line. Since the proposed solution is computationally lightweight, it adheres to the timing requirement of the BFP. The proposition requires healthy communication between the PMUs and the PDC. Nevertheless, the proposed method is fail-safe. It will resort to the conventional BFP scheme in case of loss of communication with the PDC. The proposed solution mitigates n number of cyber-attacks in a no-fault scenario. Additionally, the proposed solution can detect one cyber-attack if the attacker times the cyber-attack during a fault condition. PSCAD simulations were performed to validate the proposition on IEEE 118 bus system. Furthermore, the hardware was developed emulating the PMU-PDC communication as per IEEE C37.118-2 standard, and the execution time of the proposal was verified to ensure adherence to the timing requirement of the BFP.

ALL ARE CORDIALLY INVITED