Talk: India Semiconductor Mission by Prof Tummala Rao

Title: Next Gen, Global- level and Large-scale Device, Packaging and Systems R&D and Workforce development in India.

Speaker: Professor Tummala Rao is a distinguished IISc alumnus and an ISM, India advisor. Former IBM Fellow and Founding Director of Georgia Tech 3D Systems Packaging Research Center.

Date and Time: Wednesday, November 29, 2023. 4:00 PM

Venue: MMCR Department of Electrical Engineering IISc

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Abstract: India has not been a global player in semiconductors and packaging. But it can be with the new ISM initiative in manufacturing and R&D. Prof. Rao Tummala believes that India can transform its electronics by transforming its academics into industry-centric R&D culture, based on the Georgia Tech model, by performing massive global level R&D that India is capable of. But this R&D must be consistent with global industry needs in integrated systems packaging by highly- innovative, young, and energetic faculty and great executive Directors that India already has at its IITs and IISc. The proposal describes the strategic, next- gen global level R&D, education and skill development programs, infrastructure needed for these and the resulting IP creation and exponential growth in startups to attract many global companies to make India globally competitive. Indian Government is committed to invest in next gen R&D at its academic institutions with the state-of-the-art facilities, as well as state of the art facilities for technology development at ISRC thereby attracting companies both for R&D and manufacturing in both semiconductors and packages. With these investments, India, for the first time, has all the programs necessary for it to be a global player in the short term and global leader in the long term in integrated systems. If such an investment by the GOI is matched by the industry in a consortium mode, India can transform itself from its current design-centric to system centric with expertise and resources spanning from system design and architectures to system integration, assembly and test to offer system foundry for the world.

A proposal was developed by more than 50 academic faculty from India’s top 13 academic institution and 20  colleges and universities under the advice and leadership of Prof. Rao Tummala, as a champion for vision, strategy, and programs, based on a highly successful Georgia Tech model for leading-edge R&D from concept to commercialization, education of large number cross-disciplinary students, and industry partnership with about 100 global companies—all simultaneously. The Indian proposal is expected to result in 12 India-wide Centers of Excellence in 12 different strategic technologies funded by GOI and potentially another 12 COEs funded by the private industry. The proposal also involves partnership with more than 50 global semiconductor and packaging companies from around the globe and 24 global academic experts from Purdue, Georgia Tech, Penn State, USC, University of Arkansas, Maryland, Florida International and Illinois in the proposed 12 strategic research areas (SRAs).

The proposed R&D and workforce development programs are the best examples of how government, universities and global companies can work together for mutual benefit. For the academic community, the Indian universities will begin to perform global R&D and educate the needed workforce for the emerging semiconductor, packaging, and systems industry – the two most important strategic needs for the global industry. In so doing, it will develop global academic faculty leaders and provide jobs for their students in India. For global academic collaborators from US, Indian R&D provides additional opportunities, in addition to educated students from India as their Ph. D students for the global industry, India will develop most comprehensive, large scale global- level R&D, unlike most, if not all countries, and attract large number of companies to come to India, just for R&D in a decade. For its investment, Indian government can claim to have set up the complete ecosystem from research to technology development to manufacturing, just like in advanced countries, in semiconductors and packaging to grow its economy to capture a significant portion of $2T market, to become 3^rd largest economy by 2030.

 This program requires large number of faculty and students from electrical, mechanical, materials and chemical engineering disciplines

Biography: Education: B.E: Indian Institute of Science. Ph.D.: U of Illinois

Industry: 25 years at IBM

1. 1. IBM Fellow and Director of Advanced Packaging Lab
   2. Pioneered Industry 1^st Plasma Display
   3. Pioneered industry’s first LTCC for all RF applications.
   4. Developed Industry’s 1st 100-144 integrated chip package, very much like today’s chip let package.

Academia: 28 Years at Georgia Tech as Distinguished & Chair Professor and Founding Director

1. 1.  Founding Director of first and only   NSF Eng. Research Center in packaging in US pioneering System on Package vision
   2. Created a model at Georgia Tech for a very large and successful global industry consortium.
   3. Educated 10,000 engineers in more than 20 different packaging courses.
   4. Graduated 900 Ph. D & MS packaging engineers to supply to almost all electronic companies in US.

Professional Awards

1. 1. IEEE named him Father of Modern Packaging and created IEEE Rao Tummala Electronic Packaging Award, a technical field award.
   2.  Wrote > 800 papers, 7 Textbooks and > 100 US patents.
   3. Member of National Academy of Eng.in US and India, Fellow of IEEE, &IMAPS
   4. President of IEEE CPMT 2000-2004 and President of IMAPS 1998-2000
   5.  Distinguished Alumni of IISc, U of Illinois and Distinguished faculty of Georgia Tech

India; Now Advisor to Government of India and Championing large scale R&D and industry consortium in India.

All are welcome.