PhD Thesis Colloquium

Title: Parallel Algorithms for Efficient Utilization of Multiprocessor Architectures for Transient Stability

Student: Francis C Joseph

Faculty Advisor: Dr. Gurunath Gurrala.

Date :14^th October 2024

Time: 11 AM – 12 PM

ONLINE TEAMS LINK

ABSTRACT:

Computer hardware capabilities have been enormously increasing over the years. Multi-core processors, graphic processing units (GPUs), and field programmable gate array (FPGA) accelerators have grown significantly recently. They have opened new computational paradigms such as edge computing, fog computing, grid computing, distributed computing, cloud computing, and exascale supercomputing. However, efficiently utilising most of these computational paradigms in traditional engineering disciplines, such as power engineering, is challenging. In this thesis, efficient algorithms for multiprocessor-based high-performance computing and edge computing platforms for two power system applications are developed, power system stability assessment and power quality measurements respectively. Faster than real-time transient stability assessment of large power grids using time domain simulations with detailed models is computationally challenging. Today, the commercial tools used for this application in Energy Management Systems (EMS) worldwide rely on parallel batch processing methods, which don’t efficiently utilise the architecture of the computational paradigms. For transient stability simulations, this thesis explores a time parallel algorithm, Parareal in Time, which belongs to a class of temporal decomposition methods for time parallel solutions of differential equations. Two effective implementation approaches, Master Worker and Distributed, are analysed for large systems, and scaling tests are performed using a state space model with a Message Passing Interface (MPI) in a multiprocessor environment. One of the findings was that the performance of the Parareal depends on the accuracy and the computational cost of the coarse solver used for initialisation and subsequent correction steps. A potential coarse solver, Modified Euler (ME), a well-known solver for transient stability simulations even in commercial packages, has been explored to adapt its step size by controlling the Local Truncation Error (LTE) to achieve the desired accuracy. An LTE estimator using a Multistage Homotopy Analysis Method (MHAM), which gives an approximate solution to a set of non-linear equations in the form of a power series, is proposed to control the LTE at each integration step to enable adaptation of the ME step size. The proposed MHAM-assisted adaptive ME solver is faster and has comparable accuracy to the conventional fixed and adaptive Modified Euler solver for large systems’ transient stability simulations. Since MHAM is lighter than the ME solver and the LTE estimate is sufficient for step size adaptation, an adaptive MHAM coarse solver is proposed for the Parareal. However, MHAM provides a non-zero auxiliary parameter `c’ to select a family of solutions. Hence, an optimisation framework is also proposed to automatically select this parameter based on the system’s dynamics. Based on many case studies on test systems of different sizes, it is found that maintaining the LTE lower than the Parareal convergence tolerance improves the speedup of the Master-Worker paradigm; however, for the distributed implementation, maintaining LTE higher than the convergence tolerance gives improved speedup. An approach to include unscheduled events which arise in power system operation due to the operation of protective relays is also proposed for Parareal. The impact of frequency estimation on Parareal is evaluated using three estimation methods. It was found that the network admittance-based method has the lowest execution time. Many different types of disturbance types are performed on systems of different sizes and see that Parareal can maintain its performance. In Parareal implementation, each coarse time segment is assigned to one processor in the MPI environment. Multiple processors in a node can be assigned to a coarse time segment to improve speedup. Therefore, a shared memory-based space parallel transient stability solver is also considered for further performance enhancement. Space parallelisation of transient stability simulation involves breaking the network into subnetworks and solving each part independently while ensuring the original network’s convergence. Therefore, a Multi Area Thevenin Equivalent (MATE) based parallel solver implementation on a shared memory platform is proposed, and both space parallelisation and task parallelisation are explored. It is shown that the space parallelism can closely match the ideal speedup and can be exceeded by space + task parallelism while the network is well-partitioned. It can be further improved when combined with time parallelism. A hybrid time-space solver using OpenMP MATE, space + task parallelism, and MPI Parareal is proposed using two scheduling schemes: homogeneous and heterogeneous for both communication paradigms. The homogeneous scheduling enabled a faster-than-real time solution even for the PEGASE 13659 bus system and provided multiple combinations to achieve it. The heterogeneous can increase the performance of the hybrid solver when homogeneous scheduling is unavailable. A particular case for Hybrid Master with a single core worker was used to showcase the initialisation phase’s time reduction by reducing the coarse solver’s computational time. The current state-of-the-art chips also provide multicore architectures for edge computing applications. One such low-cost, open-source, heterogeneous, resource-constrained hardware platform is called Parallella. The unique hardware architecture of the Parallella provides many edge computing resources in the form of a Zynq SoC (dual-core ARM + FPGA) and a 16-core co-processor called Epiphany. This Parallella device was used as a measurement device for edge computing applications research in smart grids, and it could sample 3 voltages and four currents at a 32 kHz sampling rate. The thesis explores one application of such a device to measure the harmonics and compute various Power Quality (PQ) indices. A parallel implementation of multichannel FFT on Epiphany for the streaming data is developed in this regard. Epiphany 16-core architecture has very limited memory resources, and the order in which the cores are to be accessed significantly impacts the execution. Proper decomposition of the FFT algorithm tasks and scheduling the tasks for efficient core and memory usage are crucial, requiring a good understanding of the Epiphany architecture. The obtained PQ measurements from the proposed implementation are comparable to those of a commercial power analyser.

Acknowledgments:

• SERB Science and Technology Award for Research (SERB-STAR) grant, File No: STR/2020/000019 titled Hybrid Parallel Solvers for Faster than Real-time Transient Stability Analysis of Large Power Grids.

• Bosch Research and Technology Centre, Bangalore, India and by the Robert Bosch Centre for Cyber-Physical Systems, Indian Institute of Science, Bangalore, India (under Project E-Sense: Sensing and Analytics for Energy Aware Smart Campus)
• DST Young Scientist Grant DST-YSS/2015/001371, India