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X-WR-CALNAME:EE
X-ORIGINAL-URL:https://ee.iisc.ac.in
X-WR-CALDESC:Events for EE
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TZID:Asia/Kolkata
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TZOFFSETFROM:+0530
TZOFFSETTO:+0530
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DTSTART:20230101T000000
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BEGIN:VEVENT
DTSTART;TZID=Asia/Kolkata:20231109T160000
DTEND;TZID=Asia/Kolkata:20231109T170000
DTSTAMP:20260528T055651
CREATED:20231109T040748Z
LAST-MODIFIED:20231109T040827Z
UID:241152-1699545600-1699549200@ee.iisc.ac.in
SUMMARY:EE Talk: The Role of Privacy-Preserving Computation Frameworks Enabling Cooperation in Business and Legal Contracts
DESCRIPTION:Title: The Role of Privacy-Preserving Computation Frameworks Enabling Cooperation in Business and Legal Contracts \nAbstract:  Collaborative data analytics and the usage of advanced software controls are core elements for transformation of the industrial systems and automotive systems of today to future ‘smart’ manufacturing and mobility. In many scenarios within Industry 4.0 systems\, innovation is limited due to data being siloed between competing business organizations or entities in an organization. Similarly\, the concern for lack of sufficient protection mechanisms limit several transformations within the mobility/automotive domain. Effective protection mechanisms can enable the usage of data sources without the loss of competitive edge and software controls without the fear of misuse. While modification of traditional IT security methods have been actively proposed for these domains\, we argue these are typically insufficient. In this talk\, we discuss the role of privacy-preserving computation frameworks as a technical supplement to business and legal contracts to enable cooperation. Additionally\, we highlight constraints for these systems (with a focus on automotive) that make the use of traditional methods challenging.  \nSpeaker: Shalabh Jain is a Senior Research Scientist with the Security and Privacy group at the Bosch Research and Technology Center in Pittsburgh. Prior to joining Bosch Research he worked as a hardware engineer for Texas Instruments. He has been actively working in the domain of security and privacy for automotive systems\, cloud systems\, Industry 4.0 and IoT networks. He is an associate at the Carnegie Bosch Institute and responsible for mentoring postdoctoral fellows in the domain security and privacy. He is a privacy evangelist within Bosch\, co-founding the Privacy Engineering Guild and organizing the annual Bosch Privacy Engineering Summit. Additionally\, he is the North America representative for Open Bosch Research\, working on establishing collaborations between startups and Bosch Corporate Research. He leads the Pittsburgh chapter of Automotive Security Research Group (ASRG)\, a non-profit organization for building the next generation of security experts in the automotive domain. He is He received his PhD and masters from University of Maryland\, College Park and his Bachelors degree from IIT Roorkee. \nVenue and Time: EE 1st floor\, MMCR\, 9th November\, Thursday 4 PM – 5 PM
URL:https://ee.iisc.ac.in/event/the-role-of-privacy-preserving-computation-frameworks-enabling-cooperation-in-business-and-legal-contracts/
LOCATION:MMCR\, Hall C 241\, 1st floor\, EE department
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BEGIN:VEVENT
DTSTART;TZID=Asia/Kolkata:20231114T143000
DTEND;TZID=Asia/Kolkata:20231114T163000
DTSTAMP:20260528T055651
CREATED:20231114T084042Z
LAST-MODIFIED:20231114T084042Z
UID:241155-1699972200-1699979400@ee.iisc.ac.in
SUMMARY:Ph.D. Thesis Colloquium
DESCRIPTION:Thesis Title              :     Developmental Studies on a Multistage Induction Coilgun-Based Electromagnetic  \n                                        Launcher \nStudent Name          :     Ranashree Ram \nAbstract \nThe archetypal chemical propellant-based launchers (e.g.\, guns\, missiles\, spacecraft launchers\, etc.) with their hot trailing plume has been widely deployed over the decades for various applications. However\, because of certain disadvantages of these systems and the physical limitations associated with their designs\, electromagnetic launchers (EMLs) seem to offer an alternative way forward as the next-generation hypervelocity (>3 km/s) launchers. The multistage induction coilgun is one such futuristic class of EMLs that works on the principle of electromagnetic induction between an array of coils (or drive coils)\, which are wound on a long barrel of appropriate length\, and an electrically conducting projectile (or armature) placed inside the barrel. Previously charged high-voltage capacitor banks are sequentially discharged into the coils through solid-state switches leading to the generation and flow of very high pulsed currents (kA) through the coils. Time-varying magnetic flux thus produced by the pulsed currents through the coils interact with the projectile inside and induce a resultant current on it. The propulsive electromagnetic force exerted on the projectile is a product of the current through the coil\, the induced current on the projectile\, and the mutual inductance. The “turn on” and “turn off” of the coils of the various stages must be precisely and appropriately synchronized during the multistage operation to achieve a higher projectile velocity and this makes its successful design and operation a challenge. Owing to its high confidentiality in defense and space applications\, not much can be known from the published works. In the present work a four-stage induction coilgun has been designed and developed in the laboratory. The research work presented in the thesis aims to understand the factors contributing to achieving a higher muzzle velocity for a projectile of a given mass while launching a payload with the coilgun. The projectile of a coilgun can be either sleeve-type (ring-shaped projectile) or solenoid-type (multi-turn projectile). \nThe author also designed and fabricated a high-speed infrared transmitter-receiver-based sensor (with 25 ns rise and fall time) to quickly sense the moving projectile (or armature) inside the barrel. The triggering instant of the subsequent stage coils of a multistage coilgun critically depends on the projectile’s position inside the barrel. The projectile will fail to achieve the highest muzzle velocity if the subsequent stage coils are not optimally triggered in a sequence. The fast-moving projectile through the barrel necessitates the fast sensing of its position inside the barrel. In addition\, the author has also designed\, developed\, and fabricated a high-speed gate driver circuit with a peak 25 kV DC isolation for the signal circuit from the high voltage power circuit within a compact space of the printed circuit board (PCB) to trigger the high-voltage SCRs used for triggering the pulsed power source of each stage of the coilgun.. \nThe large current flowing through each stage coil creates EMI problems in the coilgun. The EMI issues corrupt the sensor data\, which prevents successful sensing of the projectile’s position. Also\, EMI causes the SCRs to trigger the coils spuriously even when the projectile has not reached its optimal triggering position inside the coil. Synchronizing the triggering of stages by preventing the EMI issues is a significant challenge and is very important in successfully operating a multistage induction coilgun. The author could successfully synchronize the stages of the coilgun by preventing spurious triggering of the SCRs using appropriate EMI mitigation techniques. \n The influence of the capacitance of the capacitor bank used in the high voltage pulsed power supply on the optimum triggering position of the projectile inside the drive coil of the coilgun has been analyzed. An empirical relationship between the projectile velocity and the charging voltage of the capacitor bank has been formulated for the first time in this thesis. The subject of the study presented in this thesis also focuses on analyzing the parameters on which the efficiency of an induction coilgun depends and how it can be optimized. Study has been performed to optimize the shape and dimensions of the projectile to achieve the highest muzzle velocity. The dependency of the projectile motion on the flow of induced current in the subsequent stages has been analyzed. The study also focuses on establishing an approach to choosing a proper distance between the stages in a multistage induction coilgun. \nA comprehensive and explicit analysis has been performed to study and explain the reasons behind the differences in the optimum triggering positions of the projectile inside each stage coil and the achieved muzzle velocities for different arrangements of the drive coil current directions in a multistage induction coilgun. \n  \nMS Teams Link: 
URL:https://ee.iisc.ac.in/event/ph-d-thesis-colloquium-2/
LOCATION:HV seminar Hall
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BEGIN:VEVENT
DTSTART;TZID=Asia/Kolkata:20231124T150000
DTEND;TZID=Asia/Kolkata:20231124T170000
DTSTAMP:20260528T055651
CREATED:20231124T054903Z
LAST-MODIFIED:20231124T054903Z
UID:241160-1700838000-1700845200@ee.iisc.ac.in
SUMMARY:Physics-Aware AI for Enabling Grid Resiliency
DESCRIPTION:Title:  Physics-Aware AI for Enabling Grid Resiliency\n  \nSpeaker:  \nDr. Anurag K Srivastava \nRaymond J. Lane Professor and Chairperson\, \nLane Department of Computer Science and Electrical Engineering \nDirector\, Smart Grid REsearch and Analytics Lab (SG-REAL) \nWest Virginia University\, Morgantown\, WV\, USA \n\nDate: 24th November 2023\, 3 pm \n  \nVenue: MMCR\, EE Dept\, IISc \n  \n  \nAbstract: \nAvailability of data from massive sensors deployment in the cyber-physical electric grid enables new monitoring and control applications.  Advancement in artificial intelligence (AI) provides an opportunity to develop data-driven technique utilizing these datasets. Some possible applications include\, early alarm and diagnosis\, predicative analysis\, distributed and decentralized control. New applications need to consider physics-induced limits and high-performance requirement in a dynamic environment. Availability of additional sensor data brings its own challenges including data anomalies\, real time processing\, data fusion\, data management and cyber-security management.  Differentiating between data anomalies\, cyber events and physical system events can be very challenging due to the similar signatures. This talk will focus on limits of AI for dynamic power grid applications\, example of Physics-Aware Machine Learning (PAAI) applications to enhance situational awareness\, and associated challenges and opportunities for enabling power grid resiliency. \n  \n \n  \nSpeaker Bio: Anurag K. Srivastava is a Raymond J. Lane Professor and Chairperson of the Computer Science and Electrical Engineering Department at the West Virginia University. He is also an adjunct professor at the Washington State University and senior scientist at the Pacific Northwest National Lab. He received his Ph.D. degree in electrical engineering from the Illinois Institute of Technology in 2005. His research interest includes data-driven algorithms for power system operation and control including cyber-resiliency analysis. Dr. Srivastava high impact research projects resulted in tools installed at the utility control center supported for more than $50M by US Department of Energy\, National Science Foundation\, Siemens Corporate Research\, Electric Power Research Institute\, Schweitzer Engineering Lab\, Power System Engineering Research Center\, Office of Naval Research and several National Labs. He is an IEEE Fellow and the author of more than 360 technical publications including three books on power system security and resiliency as well as 3 patents.
URL:https://ee.iisc.ac.in/event/physics-aware-ai-for-enabling-grid-resiliency/
LOCATION:MMCR\, Hall C 241\, 1st floor\, EE department
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BEGIN:VEVENT
DTSTART;TZID=Asia/Kolkata:20231129T100000
DTEND;TZID=Asia/Kolkata:20231129T110000
DTSTAMP:20260528T055651
CREATED:20231128T053238Z
LAST-MODIFIED:20231128T053238Z
UID:241163-1701252000-1701255600@ee.iisc.ac.in
SUMMARY:[Talk] Technology trends and innovation in HV transmission industry\,
DESCRIPTION:Talk \nTitle: Technology trends and innovation in HV transmission industry \nSpeaker: Dr. Manoj Pradhan\, Global R & D Manager HVDC\, Hitachi Energy\, Sweden \nDate: WEDNESDAY\, 29 November 2023 \nTime: 10:00-11:00 AM \nVenue: Seminar Hall\, HVE BUILDING \nCoffee will be served \nABSTRACT \nIn this presentation\, Dr. Pradhan\, R&D manager from Hitachi Energy will share technology trends in HV transmission industry and especially role of HVDC technology in enabling energy transition towards integration of renewable resources. He will provide a comprehensive view of how Hitachi Energy is playing a leading role in advancing the world’s energy system to be more sustainable\, flexible and secure. ​As the pioneering technology leader\, we collaborate with customers and partners to enable a sustainable energy future. \nBiography \n  \nManoj Pradhan joined ABB in 2008\, is now global R&D portfolio manager for HVDC at Hitachi Energy (formerly ABB)\, located in Sweden. He is responsible for technology\, product and solution readiness for both offshore and onshore HVDC projects. \nMr. Pradhan has represented Hitachi Energy in several international multiparty joint industrial initiatives (JIP). He is actively involved and leading discussions in several clean energy forum viz.\, European commission working group on offshore renewable\, EU Horizon InterOPERA and OceanGrid initiatives to enable EU’s renewable energy ambition. \nHe is a great promoter of sustainability and digitalization of power infrastructure. He has also led new business development projects in EV charging sector to align players in the ecosystem to make offerings to accelerate EV adoption. He has led cross business and customer engagement initiatives in decarbonization of steel industry. He has been board member of large research consortium on digitalization\, digital cellulose center. \nHe holds MSc. and PhD degrees in Electrical Sciences from Indian Institute of Science Bangalore\, India (2000-2004). He was senior researcher and postdoctoral research fellow at IIT Madras\, ETH Zurich\, Switzerland\, University of Queensland\, Australia. He is author of > 25 article in IEEE journals and international conferences and Inventor of > 25 granted patents and several high impact publications in CIGRE and IEEE. Mr. Pradhan holds management diploma from Wharton business school\, USA and diploma in global innovation management from Chalmers University of Technology\, Sweden. \nALL ARE WELCOME
URL:https://ee.iisc.ac.in/event/talk-technology-trends-and-innovation-in-hv-transmission-industry/
LOCATION:HV seminar Hall
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BEGIN:VEVENT
DTSTART;TZID=Asia/Kolkata:20231129T160000
DTEND;TZID=Asia/Kolkata:20231129T173000
DTSTAMP:20260528T055651
CREATED:20231129T050107Z
LAST-MODIFIED:20231129T050107Z
UID:241167-1701273600-1701279000@ee.iisc.ac.in
SUMMARY:Talk: India Semiconductor Mission by Prof Tummala Rao
DESCRIPTION:Title: Next Gen\, Global- level and Large-scale Device\, Packaging and Systems R&D and Workforce development in India. \nSpeaker: Professor Tummala Rao is a distinguished IISc alumnus and an ISM\, India advisor. Former IBM Fellow and Founding Director of Georgia Tech 3D Systems Packaging Research Center. \nDate and Time: Wednesday\, November 29\, 2023. 4:00 PM \nVenue: MMCR Department of Electrical Engineering IISc \nTeams Link \nAbstract: India has not been a global player in semiconductors and packaging. But it can be with the new ISM initiative in manufacturing and R&D. Prof. Rao Tummala believes that India can transform its electronics by transforming its academics into industry-centric R&D culture\, based on the Georgia Tech model\, by performing massive global level R&D that India is capable of. But this R&D must be consistent with global industry needs in integrated systems packaging by highly- innovative\, young\, and energetic faculty and great executive Directors that India already has at its IITs and IISc. The proposal describes the strategic\, next- gen global level R&D\, education and skill development programs\, infrastructure needed for these and the resulting IP creation and exponential growth in startups to attract many global companies to make India globally competitive. Indian Government is committed to invest in next gen R&D at its academic institutions with the state-of-the-art facilities\, as well as state of the art facilities for technology development at ISRC thereby attracting companies both for R&D and manufacturing in both semiconductors and packages. With these investments\, India\, for the first time\, has all the programs necessary for it to be a global player in the short term and global leader in the long term in integrated systems. If such an investment by the GOI is matched by the industry in a consortium mode\, India can transform itself from its current design-centric to system centric with expertise and resources spanning from system design and architectures to system integration\, assembly and test to offer system foundry for the world. \nA proposal was developed by more than 50 academic faculty from India’s top 13 academic institution and 20  colleges and universities under the advice and leadership of Prof. Rao Tummala\, as a champion for vision\, strategy\, and programs\, based on a highly successful Georgia Tech model for leading-edge R&D from concept to commercialization\, education of large number cross-disciplinary students\, and industry partnership with about 100 global companies—all simultaneously. The Indian proposal is expected to result in 12 India-wide Centers of Excellence in 12 different strategic technologies funded by GOI and potentially another 12 COEs funded by the private industry. The proposal also involves partnership with more than 50 global semiconductor and packaging companies from around the globe and 24 global academic experts from Purdue\, Georgia Tech\, Penn State\, USC\, University of Arkansas\, Maryland\, Florida International and Illinois in the proposed 12 strategic research areas (SRAs). \nThe proposed R&D and workforce development programs are the best examples of how government\, universities and global companies can work together for mutual benefit. For the academic community\, the Indian universities will begin to perform global R&D and educate the needed workforce for the emerging semiconductor\, packaging\, and systems industry – the two most important strategic needs for the global industry. In so doing\, it will develop global academic faculty leaders and provide jobs for their students in India. For global academic collaborators from US\, Indian R&D provides additional opportunities\, in addition to educated students from India as their Ph. D students for the global industry\, India will develop most comprehensive\, large scale global- level R&D\, unlike most\, if not all countries\, and attract large number of companies to come to India\, just for R&D in a decade. For its investment\, Indian government can claim to have set up the complete ecosystem from research to technology development to manufacturing\, just like in advanced countries\, in semiconductors and packaging to grow its economy to capture a significant portion of $2T market\, to become 3rd largest economy by 2030. \n This program requires large number of faculty and students from electrical\, mechanical\, materials and chemical engineering disciplines \nBiography: Education: B.E: Indian Institute of Science. Ph.D.: U of Illinois \n\nIndustry: 25 years at IBM \n\n\n\nIBM Fellow and Director of Advanced Packaging Lab\nPioneered Industry 1st Plasma Display\nPioneered industry’s first LTCC for all RF applications.\nDeveloped Industry’s 1st 100-144 integrated chip package\, very much like today’s chip let package.\n\n\n\nAcademia: 28 Years at Georgia Tech as Distinguished & Chair Professor and Founding Director \n\n\n\n Founding Director of first and only   NSF Eng. Research Center in packaging in US pioneering System on Package vision\nCreated a model at Georgia Tech for a very large and successful global industry consortium.\nEducated 10\,000 engineers in more than 20 different packaging courses.\nGraduated 900 Ph. D & MS packaging engineers to supply to almost all electronic companies in US.\n\n\n\nProfessional Awards \n\n\n\nIEEE named him Father of Modern Packaging and created IEEE Rao Tummala Electronic Packaging Award\, a technical field award.\n Wrote > 800 papers\, 7 Textbooks and > 100 US patents.\nMember of National Academy of Eng.in US and India\, Fellow of IEEE\, &IMAPS\nPresident of IEEE CPMT 2000-2004 and President of IMAPS 1998-2000\n Distinguished Alumni of IISc\, U of Illinois and Distinguished faculty of Georgia Tech\n\n\n\nIndia; Now Advisor to Government of India and Championing large scale R&D and industry consortium in India. \n\nAll are welcome.
URL:https://ee.iisc.ac.in/event/talk-india-semiconductor-mission-by-prof-tummala-rao/
LOCATION:MMCR\, Hall C 241\, 1st floor\, EE department
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