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X-WR-CALNAME:EE
X-ORIGINAL-URL:https://ee.iisc.ac.in
X-WR-CALDESC:Events for EE
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TZID:Asia/Kolkata
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TZOFFSETFROM:+0530
TZOFFSETTO:+0530
TZNAME:IST
DTSTART:20220101T000000
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BEGIN:VEVENT
DTSTART;TZID=Asia/Kolkata:20220803T163000
DTEND;TZID=Asia/Kolkata:20220803T173000
DTSTAMP:20260615T184558
CREATED:20220803T022611Z
LAST-MODIFIED:20220803T022611Z
UID:239858-1659544200-1659547800@ee.iisc.ac.in
SUMMARY:Thesis Defence of Mr. Rupam Pal @ 11am
DESCRIPTION:Degree Registered; PhD \nGuide: Prof. Udaya Kumar \nThesis Title: Influence of soil’s electrical parameters on lightning stroke-current evolution and fields in the close range \nDate: 3rd August 2022;  Time: 11.00 AM \nMode: It will be in hybrid mode. To join online: Click here to join the meeting \nVenue:  MMCR Room\, department of electrical engineering. \nAbstract: The lightning return stroke forms one of the severest natural sources of electromagnetic interference for systems\, both in the air and soil. Several physical fields govern this complex physical phenomenon\, and most of the engineering applications resort to much simplifications. Several pertinent aspects are somewhat unclear\, and it is not practical to conduct the field measurements to answer them. One such important aspect\, which is of practical relevance\, is the influence of soil’s electrical properties on the stroke current evolution and the fields in the close range. It is investigated in the present work. \nAmong different models for the lightning return stroke\, only the ‘Self-consistent return stroke’ model is found to be suitable for the intended work. This model employs a macroscopic electrical representation of the underlying physical phenomenon to emulate the stroke current evolution.  However\, this model has considered only a perfectly conducting earth and relied on the time-domain thin-wire formulation to solve for the associated dynamic electromagnetic fields.  On the other hand\, a more realistic representation of the soil\, including its dispersive nature and non-linearity\, is required for the present work.  This necessitated suitable adoption of the ‘Finite difference time domain’ (FDTD) method for modeling the channel and its corona sheath\, soil-ionization\, and soil-dispersion. \nThe developed FDTD formulation is used to investigate and ascertain the role of soil’s electrical properties on the stroke current evolution and the field in the soil. For the first time\, it is shown that the soil’s electrical conductivity has some noticeable influence on the stroke current magnitude\, and the ionization phenomenon in soil tends to reduce this influence. The dispersive nature of the soil’s conductivity\, and permittivity to a lesser extent\, significantly reduces the field in the soil. The current concentration near the surface\, which is expected for the skin-effect phenomenon\, is altered at later periods by the field produced by the channel current. Also\, the normal field in the soil changes its polarity. The vertical stratification of the soil\, which is expected near the water body-soil interface\, influences the field in the soil quite significantly. A strike to a model mountain leads to an entirely different field structure beyond its base. Similarly\, a strike to a tall tower produces a field in the soil\, which is bipolar near the tower base.  These are quite novel findings\, and many of them are somewhat unexpected. \nIn summary\, significant contributions have been made towards the FDTD formulations for modeling lightning phenomena and finding the role of soil’s electrical parameters on lightning stroke current evolution and the resulting field.
URL:https://ee.iisc.ac.in/event/thesis-defence-of-mr-rupam-pal-11am/
LOCATION:EE\, MMCR
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Asia/Kolkata:20220816T210000
DTEND;TZID=Asia/Kolkata:20220816T223000
DTSTAMP:20260615T184558
CREATED:20220810T000557Z
LAST-MODIFIED:20220810T000914Z
UID:239860-1660683600-1660689000@ee.iisc.ac.in
SUMMARY:Thesis Defence of Shamibrota Kishore Roy @3.30pm
DESCRIPTION:Title: Characterization and Modelling of Switching Dynamics of SiC MOSFETs \nName of the Student: Shamibrota Kishore Roy \nName of the Advisor: Dr Kaushik Basu \nDegree Registered: PhD \nDate and Time: 16 August 2022\, 03:30 PM (IST)  \nPlace: MMCR EE \nMeeting Link: Click here to join the meeting \nAbstract: Silicon Carbide MOSFETs (SiC MOSFETs) fall into the class of wide band gap (WBG) power devices. These devices are commercially available in the voltage range of 600-3300V and are superior to the state-of-the-art Si insulated gate bipolar junction transistors (IGBTs) due to their better electrical and thermal performances. \n\n\nIn power electronic converters\, semiconductor devices operate as switches. They can be turned on or off using a control signal. Unlike ideal switches\, practical devices require a finite amount of time to transit between on and off states. This is termed switching transient. Non-zero finite product of voltage and current during switching transient results in switching loss. Characterization and modelling of switching dynamics help gain insight into the switching process and estimate switching loss. It is useful over experimental measurement techniques like double pulse test (DPT) or calorimetric measurements in the early stages of power converter design. Estimated loss through the switching transient model can be used to determine switching frequency and selection of power devices. Also\, switching dynamics is strongly impacted by the device and circuit parasitic. Insight into the switching process helps in the proper design of gate driver and power circuit layout. Superior material properties of SiC MOSFET lead to a smaller die size compared to the state-of-the-art Si-based power devices. It results in faster switching transients and lower switching loss. However\, it excites device and circuit parasitic that may lead to prolonged oscillation\, high device stress\, spurious turn-on and EMI-related issues Etc. So\, the benefit of using SiC MOSFET as power devices come with numerous design challenges resulting in slow commercial adaptation. It is predicted that the overall market share of WBG devices (SiC and GaN together) will be roughly 10% of the total market for power semiconductors by 2025. \n\n\nTo overcome the design challenges and fully utilize the benefits of fast switching SiC MOSFETs\, a better understanding of dynamics is essential. However\, the switching dynamics of SiC MOSFET is different compared to its Si counterpart. This is due to the highly non-linear device characteristics. Also\, the fast-switching transient of SiC MOSFET excites the circuit parasitic and makes the switching dynamics highly involved. This work focuses on the characterization and modelling of switching transient of SiC MOSFET. Simulation and analytical modelling approaches are used to model the switching dynamics and estimate switching loss. The behavioral modelling approach is a widely used simulation-based approach (i.e.\, Spice simulation) and it can capture the switching transient with sufficient accuracy. This approach uses lumped parameter model (circuit model) of the device and external circuit and can be simulated in a circuit simulator like MATLAB/Simulink. This implies the numerical solution of a set of coupled non-linear differential equations. On the other hand\, the analytical modelling approach is based on the simplified approximate solution of a set of coupled non-linear differential equations obtained from the behavioral model. In order to obtain the approximate solution\, the entire switching process is divided into different modes with clearly defined transition conditions. Different approximations are used in each mode to arrive at analytical closed-form solutions or reduced order coupled non-linear differential equations. This model is computationally efficient and can be implemented easily in freely available programming platforms such as C or Python. Also\, the parameters required for analytical models can be obtained from the device datasheet. This modelling approach is beneficial for the converter design when switching loss and junction temperature need to be evaluated over several operating points for many available devices from different manufacturers. \n\n\nIn the first part of the work\, a behavioral model is developed to capture the switching transient of SiC MOSFET. It considers the detailed channel current model and captures the gradual transition effect from ohmic to saturation region. A piecewise non-linear model of gate-drain capacitance is used and a comprehensive non-linear model of drain-source and diode capacitances is considered. Also\, the effect of the circuit parasitic are taken into account. A double pulse test (DPT) based experimental measurement is used for validation. \n\n\nIn the next part\, analytical models to capture the switching dynamics (hard turn on and off) of SiC MOSFET are proposed. These models are based on the behavioral model developed in the first part of the work. In the existing literature\, simplified modelling of channel current and device capacitances was used\, resulting in underestimation of switching transition time and loss. On the contrary\, the proposed approach considers the detailed non-linear model of channel current and device capacitances along with circuit parasitic. It accurately estimates transition time\, switching loss\, (dv=dt)\, (di=dt)\, and transient over-voltage. Double pulse test (DPT) based experimental measurement and behavioral simulations are used for validation. \n\n\nIn soft switched converters (i.e.\, DAB)\, hard turn-on is avoided by the converter operation\, and the switching loss is solely dictated by the turn-off loss. The addition of external capacitance across the device prolongs the voltage rise period and reduces overlap between voltage and current during turn-off transient. This is termed zero voltage switching (ZVS). However\, the selection of external capacitance is not straightforward. A large external capacitance reduces switching loss\, (dv/dt)\, (di/dt)\, and transient over-voltage but may also result in higher dead-time loss and reduced switching frequency. Also\, this may lead to partial soft switching for light load conditions if the dead-time is not sufficient. In this work\, an analytical model to capture capacitor-assisted turn-off switching transient is also presented where the detailed non-linear modelling of the SiC MOSFET is used. This leads to a better estimation of switching transition time\, actual loss\, (dv/dt)\, (di/dt)\, and transient overvoltage. Also\, a step-by-step design procedure for the optimal external snubber capacitor was proposed. It ensures the soft-switching condition is satisfied\, and the maximum (dv/dt) rate is within a predefined limit for a specified DC bus voltage and range of load currents. This procedure also helps in the selection of proper dead-time to avoid partial soft-switching conditions. Double pulse test (DPT) based experimental measurement and behavioral simulations are used to validate the analytical model. \nThe fast switching transient of SiC MOSFET is significantly impacted by circuit parasitic. Circuit parasitic inductances are dependent on both device package (device lead\, wire bond etc.) and circuit layout (PCB layout)\, whereas circuit parasitic capacitances are contributed solely by the circuit layout. Proposed switching transient models require circuit parasitic as input\, and the values are not usually available in the device datasheet. Measurement is the only way to accurately estimate some device package-dependent circuit parasitic when the internal package geometry is unknown. In this context\, a set of simple measurement techniques are proposed to determine important circuit parasitic necessary for switching dynamics study. The accuracy of the proposed technique is verified through behavioral simulation\, and experimental results of the hard turn off and capacitor assisted soft turn off dynamics of SiC MOSFET over a range of operating conditions for two 1.2-kV discrete SiC MOSFET of different current ratings and two different PCB layouts. Measured circuit parasitic when used in switching transient model\, correctly predicted both hard turn-off and capacitor assisted soft turn off switching dynamics over a wide range of operating conditions. \nAn interactive software based on the proposed analytical model is also developed in Python environment. The developed software takes device parameters and circuit parasitic as input and estimates transition time\, switching loss\, (dv/dt)\, (di/dt) and transient over-voltage as a function of load current. \nALL ARE CORDIALLY INVITED
URL:https://ee.iisc.ac.in/event/thesis-defence-of-shamibrota-kishore-roy-3-30pm/
LOCATION:EE\, MMCR
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Asia/Kolkata:20220817T213000
DTEND;TZID=Asia/Kolkata:20220817T223000
DTSTAMP:20260615T184558
CREATED:20220803T021919Z
LAST-MODIFIED:20220803T022132Z
UID:239854-1660771800-1660775400@ee.iisc.ac.in
SUMMARY:3rd talk of the "TCE Lecture Series on Power Systems"
DESCRIPTION:Speaker: Prof Ramakrishna Gokaraju of University of Saskatchewan\, Canada\nTitle: High-Speed Digital Relaying & Transient Stability Prediction/Controlled Islanding to Prevent Large-Scale Blackouts (Poster)\nAbstract: Keeping the lights “on”\, an axiom in power systems engineering has taken on a new level of complexity with increasing pressure on the existing\nnetwork to deliver more power over existing infrastructure. The first part of the presentation will discuss High-Speed Digital Relaying Scheme for EHV/UHV transmission systems (345 kV and above) with half-cycle operating times. The second part of the presentation will discuss a scheme\nfor real-time transient stability prediction in larger grids\, and a Remedial Action Scheme (RAS) scheme applying intentional islanding to prevent large-scale blackouts. The proposed controlled islanding consists of two parts as “when” and “where” to island. The proposed methodology simplifies the communication between central “when” unit and each generator protection relay by using status flags communicated with IEC 61850 RGOOSE protocol. The proposed “when” methodology is combined with the “where” method based on graph theory to test the overall controlled islanding scheme.\n\nBio: Ramakrishna Gokaraju received his Bachelor of Engineering degree (with Distinction) in Electrical and Electronics Engineering from the National Institute of Technology\, Trichy\, India in April 1992. He received the M.Sc. and Ph.D. degrees in Electrical and Computer Engineering from the University of Calgary\, Calgary\, AB\, Canada\, in 1996 and 2000\, respectively. From 1992-‘94 he worked with the Larsen & Toubro\, Chennai\, India as a graduate engineer and then later with the IIT\, Kanpur & NIT\, Rourkela  as a Project Associate/Research Engineer.  From 1999-2002\, he was a Research Scientist with the Alberta Research Council and a Staff Software Engineer with IBM Toronto Lab. He joined the Department of Electrical & Computer Engineering at the University of Saskatchewan in 2003 and is currently a professor in the department. His current research works are in high speed digital relaying\, controlled/active islanding in electric grids\, wild fire mitigation due to electrical faults\, and computer modelling of the new emerging nuclear-based Small Modular Reactors (SMRs) for electricity and other energy applications.
URL:https://ee.iisc.ac.in/event/3rd-talk-of-the-tce-lecture-series-on-power-systems/
LOCATION:EE\, MMCR
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Asia/Kolkata:20220819T213000
DTEND;TZID=Asia/Kolkata:20220819T223000
DTSTAMP:20260615T184558
CREATED:20220822T042938Z
LAST-MODIFIED:20220822T042938Z
UID:239869-1660944600-1660948200@ee.iisc.ac.in
SUMMARY:Lecture by Prof. Mainak Sengupta @4.00pm
DESCRIPTION:Title: Induction heating : basic principles and power converters\nSpeaker: Prof. Mainak Sengupta\, Professor\, Department of Electrical Engineering\, IIEST Shibpur\nVenue: Multimedia Classroom (Hybrid Mode)\, Department of Electrical Engineering\, Indian Institute of Science\nDate and Time: Friday 19/08\, 4:00 pm\nMeeting Link: Click here to join the meeting\nAbstract: Induction heating is a non-contact and “clean” electrical heating process. Induction Heating units and furnaces are used for melting (500Hz or so)\, surface heat treatment (10 s of kHz)\, induction welding\, foil heating etc. and even cooking. The concepts involved are elementary yet interesting. The phenomenon of resonance may be used in an interesting manner (either parallel or series). The converters used might have a current source or a voltage source configuration. Some analytical and experimental studies shall be discussed. \nSpeaker Biography: Prof. Mainak Sengupta did his B.E (EE) from Jadavpur University in Calcutta in 1992. He did his MTech (Power Electronics and Machine Drives\, Electrical Engg.) In January 1994 under Prof. K. Venkataratnam. In January 1994 he joined Ph D studies under Prof. K. Venkataratnam and Prof. Tapas K. Bhattacharya. He obtained his PhD degree in September 1999. In between\, after completing the experimental work\, he joined as a Lecturer in EE\, in the then Bengal Engineering College (Deemed University) and is since teaching there. He has been a Professor since June 2010.
URL:https://ee.iisc.ac.in/event/lecture-by-prof-mainak-sengupta-4-00pm/
LOCATION:EE\, MMCR
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Asia/Kolkata:20220824T213000
DTEND;TZID=Asia/Kolkata:20220824T223000
DTSTAMP:20260615T184558
CREATED:20220822T043420Z
LAST-MODIFIED:20220822T044126Z
UID:239871-1661376600-1661380200@ee.iisc.ac.in
SUMMARY:Thesis Colloquium of Ms. Mani Madhoolika Bulusu
DESCRIPTION:Degree Registered: M.Tech.(Research) \nAdvisor: Prof. Chandra Sekhar Seelamantula \nTitle: Interpolation of Digital Elevation Models Using Generative Adversarial Networks \nVenue: Multimedia Classroom (MMCR)\, Department of Electrical Engineering\, IISc \nDate & Time: August 24\, 2022; 4 PM onward (coffee will be served during the talk) \nAbstract: A digital elevation model (DEM) is a three-dimensional representation of elevation data of a terrain such as a lunar terrain acquired using a Chandrayaan rover or a terrestrial terrain acquired by a reconnaissance aircraft. Terrestrial DEMs are used in hydrological modeling\, geomorphology\, and glaciology. Lunar DEMs can be used to locate natural resources and to identify prospective landing sites for exploratory missions. Hence\, high-quality\, reliable DEMs are of great significance. DEMs are generally captured using LiDAR (Light Detection and Ranging)\, stereophotogrammetry\, and time-of-flight cameras. However\, a reliable DEM cannot be constructed without adequate landmark points/features. This is the case with smooth terrains\, occlusions\, and multiple voids. The measurements are nonuniform in general. Hence\, there is a need for interpolation and void-filling techniques to estimate the elevation with a high accuracy. \nInverse distance weighting (IDW)\, De Launay triangulation\, and Kriging are some of the popular benchmark algorithms for interpolating scattered and nonuniformly spaced data. Manual parameter tuning\, inability to recover high-frequency information\, and high computational complexity are some of the issues that these traditional interpolation techniques suffer from. Deep Learning (DL) has proven to be effective in providing excellent results in the field of image processing and computer vision\, specifically in the tasks of super-resolution\, image in-painting\, extrapolation\, and segmentation. With the massive success of DL in several image processing and computer vision applications\, its applicability has been explored for solving the DEM interpolation problem as well. However\, convolutions are not readily defined if the measurements are nonuniform. Hence\, the recent DL based research on DEM interpolation has only focused only on regularly spaced data. \nWe address the realistic problem of DEM interpolation from irregularly spaced measurements\, with the density of measurements varying spatially. This is a new and unexplored direction in the deep learning setting. We propose a new and robust DL architecture based on Generative Adversarial Networks (GANs) to perform interpolation and result in a uniform DEM with a user-specified resolution. The generator comprises three modules: Learnable Distance Weighting (LDW)\, DEM in-painting\, and Continuous Convolution (CC). We designed the novel LDW module as a learnable counterpart to the popular IDW algorithm that operates on the distances between the measurements and grid locations. This reduces the problem to that of inpainting post the LDW transformation. The proposed method is evaluated on synthetically generated data and on standard publicly available NASA (LOLA LRO) datasets using the mean relative error and PSNR as performance metrics. Extensive experiments justify the effectiveness and accuracy of the proposed approach in comparison with the benchmark techniques. We conclude the presentation by discussing possible future directions for DL based DEM interpolation. \nAll are invited.
URL:https://ee.iisc.ac.in/event/thesis-colloquium-of-ms-mani-madhoolika-bulusu/
LOCATION:EE\, MMCR
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Asia/Kolkata:20220829T210000
DTEND;TZID=Asia/Kolkata:20220829T223000
DTSTAMP:20260615T184558
CREATED:20220826T083354Z
LAST-MODIFIED:20220826T083354Z
UID:239876-1661806800-1661812200@ee.iisc.ac.in
SUMMARY:Thesis Colloquium of Manish Tathode @3.30pm
DESCRIPTION:Title:  Fast and Compact Voltage Equalizer for Satellite Applications.Advisor: Prof. Vinod John.Date and Time: Monday\, 29th August 2022\, 3.30 pm.Location: MMCR\, EE Department.Meeting Link: click here for Meeting Link \nAbstract: Lithium-ion batteries have now become an critical constituent of Electrical Power System of solar-powered satellites due to their high energy density\, wider operating temperature range and better radiation tolerance. For compact realization and better space utilization\, the series-parallel connected Li-ion batteries are operated with currents close to the design limit of the cells\, speeding up the increase in the inherent initial imbalance in the individual cell voltages in a series connected stack\, demanding fast equalization. Active multicell-to-multicell equalization achieve fast equalization by efficient charge transfer among multiple cells in the series connected stack. PS-MAHB equalizer is a multicell-to-multicell equalizer\, with its open-loop control maintains high equalization current throughout the equalization. Its soft-switched operation and modularization abilities make it an attractive choice for space applications. However\, it lacks the necessary protective features and required redundancy essential for its use in space applications. Hence\, a Modified PS-MAHB (MPS-MAHB) equalizer is developed by incorporating necessary protection features and redundancy in the PS-MAHB equalizer. The Failure Mode Impact Analysis of the MPS-MAHB equalizer reveals that during the most likely switch short circuit failure mode\, the faulty part of the equalizer is disconnected by the protective device and the redundancy does not let the cell get out of the equalization.The existing static phase shift-based control of the equalizer causes direct dependency of the equalization currents on the cell voltages and limits the equalization current levels to lower than the design equalization current value when the cell voltages are lower. Thus\, the control works with reduced rate of equalization\, and causes the under-utilization of the equalizer hardware for significant duration of time in the charge-discharge cycle. A dynamic phase shift-based control is proposed to maximize the equalization current through the cells irrespective of the cell voltages which further increases the rate of equalization and improves the equalizer hardware utilization. In the simulation\, a significant improvement in the equalization rate compared to the static phase shift control is verified with the proposed dynamic phase shift-based control.The compact hardware realization of the equalizer hardware and the voltage sensors addresses the space-volume constraints in satellite applications. The equalizer hardware is realized as 4-cell equalizer modules\, and the compactness of the equalizer hardware is achieved by pushing the switching frequency to 1MHz reducing the values and sizes of the passive components. The challenges faced during the PCB design of the 4-cell equalizer module are addressed by the design. A non-isolated high-precision op-amp based voltage sensing scheme is developed to target the equalization band close to 10mV. The concept of easy-to-design motherboard-based interface is introduced\, which does not require any changes in the design of 4-cell equalizer module and the voltage sensor board\, irrespective of the cell connector geometry.The experimental results verify the operation of the equalizer showing the convergence of cell voltages from the initial imbalance of 300mV to the band of 10mV. The impact of the non-ideal dynamic response of the Li-ion cell voltage on the voltage-sensing-based control algorithm is discussed along with the necessary modifications incorporated in the control.We request your presence to the colloquium.All are welcome.
URL:https://ee.iisc.ac.in/event/thesis-colloquium-of-manish-tathode-3-30pm/
LOCATION:EE\, MMCR
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