EE

Talk on Things you should know before submitting your next paper
2025-04-17 14:00 - 17:00 (Asia/Kolkata) | MMCR, Hall C 241, 1st floor, EE department
A two-part talk on
“Things you should know before submitting your next paper”

by

Professor Alessandro Foi, Tampere University (TAU), Finland
Former Editor-in-Chief, IEEE Transactions on Image Processing

on April 17, 2025 (Thursday)

from 2 PM to 5 PM (coffee break at 3.15 PM)

Venue: Multimedia Classroom (MMCR), EE Department

Hosts: Prof. Chandra Sekhar Seelamantula (EE) and Prof. Soma Biswas (EE)

Abstract:
1) Publishing process; Ethics and Etiquette : “Things you should know before submitting your next paper”
The lecture is particularly addressed to new authors with little experience about the publication workflow and principles, and it is focused on the dos and don’ts for successfully publishing a technical paper. It offers an overview of the peer-review process and discusses the ethics and etiquette standards that authors are expected to uphold and that reviewers and editors are looking for. The lecture is based on material used at IEEE training events for authors and volunteers, supplemented by additional material by the Committee on Publication Ethics (COPE); it discusses general principles followed by various publishers and communities in science and engineering.

Topics include: choice of the publication venue, framing of the contribution with respect to prior art and literature, authorship and acknowledgment, fair reporting of own and others’ results, appropriate disclosure and referencing to own previous work, appropriate description and citing of prior work, plagiarism, duplicate submissions, inappropriate replication, and bibliometric manipulation, author’s responsibilities.

2) Responding to reviews and managing the revision process
It is extremely rare (though not impossible) that a manuscript submitted to a top-tier journal gets accepted “as is” after the review of the original submission. Most often the manuscript goes through an iterative process, where editors interact with authors and reviewers with the goal of revising the manuscript to make it suitable for publication in the journal. The lecture discusses the manuscript revision process, highlighting the editorial perspective and the typical mistakes that authors make. Participants will learn how to manage and execute a productive and efficient revision, ultimately maximizing the chances that the revised manuscript will get accepted, and in fewer iterations.

Speaker’s biography:
Alessandro Foi is a Professor of Signal Processing at Tampere University (TAU), Finland. He leads the Signal and Image Restoration group and he is the director of TAU Imaging Research Platform. He is also the CTO of Noiseless Imaging, a company specialized in noise-removal, restoration, and enhancement technology for the imaging industry.
He received the M.Sc. degree in Mathematics from the Università degli Studi di Milano, Italy, in 2001, the Ph.D. degree in Mathematics from the Politecnico di Milano in 2005, and the D.Sc.Tech. degree in Signal Processing from Tampere University of Technology, Finland, in 2007. His research interests include mathematical and statistical methods for signal processing, functional and harmonic analysis, and computational modeling of the human visual system. His work focuses on spatially adaptive algorithms for the restoration and enhancement of digital images, on noise modeling for imaging devices, and on the optimal design of statistical transformations for the stabilization, normalization, and analysis of random data. He is a Fellow of the IEEE for his contributions to image restoration and noise modeling.

He was the Editor-in-Chief of the IEEE Transactions on Image Processing from 2021 to 2023. He previously served as a Senior Area Editor for the IEEE Transactions on Computational Imaging and as an Associate Editor for the IEEE Transactions on Image Processing, the SIAM Journal on Imaging Sciences, and the IEEE Transactions on Computational Imaging.

Talk on Noise in imaging: focus on correlation and nonlinearity
2025-04-16 02:00 - 17:00 | MMCR, Hall C 241, 1st floor, EE department
A two-part talk on

“Noise in imaging: focus on correlation and nonlinearity”
by

Professor Alessandro Foi*, Tampere University (TAU), Finland
(* of the BM3D fame, among other things)

on April 16, 2025 (Wednesday)

from 2 PM to 5.30 PM (coffee break at 3.30 PM)

Venue: Multimedia Classroom (MMCR), EE Department

Abstract:
Understanding and characterizing noise is a foundational part of the design and analysis of an imaging system, and it is also essential for the development of the corresponding image processing modules. In this talk we consider broad classes of heteroskedastic image observations and specifically focus on the noise correlation, the noise anisotropy, and on the nonlinear effects that can arise when dealing with capture at low signal-to-noise ratio or when maximizing the coverage of a narrow dynamic range. We demonstrate possibly unexpected and perhaps counter-intuitive phenomena which, unless suitably modeled and accounted for, can significantly disrupt the noise analysis and other operations in an image processing pipeline.
The talk is divided into two parts.
In the first part, I will introduce concrete examples and the relevant mathematical models of noise found in various imaging and image processing systems used in biomedical, defense, security, as well as consumer applications, including x-ray tomography, infrared thermography, confocal fluorescence microscopy, and on-demand video streaming.

In the second part, I will discuss the spectral distortion that takes place when nonlinear transformations are applied to correlated noise. In particular, I will consider the case of clipping (e.g., saturation, over-exposure, under-exposure) and the application of variance-stabilizing transformations.

Biography of the speaker:
Alessandro Foi is a Professor of Signal Processing at Tampere University (TAU), Finland. He leads the Signal and Image Restoration group and he is the director of TAU Imaging Research Platform. He is also the CTO of Noiseless Imaging, a company specialized in noise-removal, restoration, and enhancement technology for the imaging industry.

He received the M.Sc. degree in Mathematics from the Università degli Studi di Milano, Italy, in 2001, the Ph.D. degree in Mathematics from the Politecnico di Milano in 2005, and the D.Sc.Tech. degree in Signal Processing from Tampere University of Technology, Finland, in 2007. His research interests include mathematical and statistical methods for signal processing, functional and harmonic analysis, and computational modeling of the human visual system. His work focuses on spatially adaptive algorithms for the restoration and enhancement of digital images, on noise modeling for imaging devices, and on the optimal design of statistical transformations for the stabilization, normalization, and analysis of random data. He is a Fellow of the IEEE for his contributions to image restoration and noise modeling.

He was the Editor-in-Chief of the IEEE Transactions on Image Processing from 2021 to 2023. He previously served as a Senior Area Editor for the IEEE Transactions on Computational Imaging and as an Associate Editor for the IEEE Transactions on Image Processing, the SIAM Journal on Imaging Sciences, and the IEEE Transactions on Computational Imaging.

Host faculty: Prof. Soma Biswas (EE) and Prof. Chandra Sekhar Seelamantula (EE)

EECS RESEARCH STUDENTS SYMPOSIUM - 2025
2025-04-03 08:00 - 2025-04-04 17:00 | IISc
EECS RESEARCH STUDENTS SYMPOSIUM – 2025

The following is the link:
(https://eecs.iisc.ac.in/EECS2025/

PhD Thesis Defense
2025-03-27 14:00 - 17:00 | Multi-Media Class Room (MMCR), EE Department (Hybrid mode)
Name of the Candidate: Lalit Manam
Research Supervisor: Venu Madhav Govindu
Date and Time: March 27, 2025, Thursday, 2:00 PM
Venue: C-241, First Floor, Multimedia Classroom (MMCR), EE
Title: Global Methods for Camera Motion Estimation
Abstract:
In computer vision, Structure-from-Motion (SfM) aims to recover a 3D reconstruction of a scene from a collection of images of the scene. SfM has been of interest to the 3D computer vision community for the last few decades, with a wide range of scientific, industrial and domestic applications. A key component of global approaches to SfM is estimating the motion of individual cameras, i.e. their rotation and translation with respect to a frame of reference. The camera motions are generally not available a priori, making their estimation a crucial component. This thesis focuses on accurate, reliable and efficient estimation of camera motions in SfM. We examine a number of issues concerning the estimation of camera motions, namely input quality, choice of cost function and the underlying graph representation, and develop methods to address these issues.
Input Quality: We examine the problem of translation averaging, where all camera translations are simultaneously estimated, given relative directions between them as the input. The accuracy of relative camera directions is limited due to multiple factors relating to how they are obtained. We take recourse to keypoint correspondences between image pairs from which relative motions between the cameras are estimated. We propose a modular framework to iteratively reweight keypoint correspondences based on their global consistency via translation averaging methods. Our proposed framework improves relative translation directions in comparison to the translation averaging scheme used.
Choice of Cost Function: In translation averaging, recovering camera translations from relative directions involves two types of optimization costs, either comparing directions or displacements. These cost functions are often relaxed to obtain simpler optimization approaches. We observe that neither cost performs the best under varying distributions of the underlying camera translations and the noise present in the input directions. We propose a principled approach to recursively fuse the estimates obtained from both the relaxed costs using a principled uncertainty model. Our method leads to improvement in camera translation estimates compared to the individual costs.
Graph Representation: We leverage the underlying graph representation that arises due to relationships between cameras in two applications to improve camera motion estimates. In the first application, we introduce the idea of sensitivity in translation averaging, which analyzes the change in camera translations with small perturbations to input directions. We develop two different formulations to theoretically analyze the sensitivity/conditioning of the problem based solely on the inputs. We propose efficient algorithms to remove the ill-conditioned configuration of inputs, which is abundant in real data. Removal of ill-conditioned inputs significantly improves the translation estimates, revealing the benefits of our analysis.
The second application that leverages graph representation solves the tasks of graph sparsification and disambiguation of repeated structures in a unified manner. We present a scoring mechanism to identify redundant and false edges and remove them with a threshold that is optimal under an edge selection cost. We design efficient algorithms which can be applied as a preprocessing step to any SfM pipeline. Our approach handles both tasks in a unified manner, making it practical for use. Applying our methods reduces reconstruction time due to the sparsification of graphs and avoids superimposed reconstructions because of repeated structures being disambiguated.

PhD Oral Examination
2025-03-25 15:00 - 17:00 | MMCR, Hall C 241, 1st floor, EE department
The oral examination of Lalgy Gopi will be held at the Multi-Media Class Room (MMCR), EE Department, between 3 pm and 5 pm on Tuesday, March 25.

Colloquium
2025-03-20 11:30 - 13:00 | MMCR, Hall C 241, 1st floor, EE department
Date & Time: 20th March 2025, at 11:30 am
Speaker: Mr. Varun Krishna P S
Venue: EE, MMCR [1st Floor, C241]

Title: Self-Supervised Learning Approaches for Content Factor Extraction from Raw Speech

Abstract:
The rapid expansion of the digital data has led to a growing interest in self-supervised learning (SSL) techniques, particularly for speech processing tasks where labeled data is often scarce. SSL enables models to learn meaningful representations directly from raw data by capturing inherent structures and patterns without requiring explicit supervision. To be effective, speech representations must not only capture content-related information—such as phonetic, lexical, and semantic features—but also remain robust against speaker variations, co-articulation effects, channel distortions, and background noise. The focus of this talk is to describe our efforts in developing self-supervised learning techniques in extracting semantic content from raw speech while remaining invariant to non-semantic speech factors.

In the first part of the talk, we propose the Hidden Unit Clustering (HUC) framework, which integrates contrastive learning with deep clustering techniques to enhance representation quality. A speaker normalization strategy is incorporated to mitigate speaker variability, ensuring that the extracted representations focus primarily on the content-related information. Additionally, a heuristic data sampling method is introduced to generate pseudo-targets for deep clustering, further refining the learned representations. The framework is evaluated across multiple SSL models, demonstrating significant improvements in phonetic and semantic benchmarks, as well as superior performance in the low-resource ASR settings.

The second part of the talk focuses on the efforts to achieve context-invariant representations to address the challenges posed by co-articulation effects and variations in speaker and channel characteristics. To achieve this, a pseudo-con loss framework is proposed, leveraging pseudo-targets to guide the contrastive learning and enhance robustness. This approach serves as an effective auxiliary module that can be seamlessly integrated into SSL models based on deep clustering. Extensive evaluations demonstrate state-of-the-art performance across multiple ZeroSpeech 2021 sub-tasks, as well as significant improvements in phoneme recognition and ASR performance.

In the final part of the talk, we explore the integration of adversarial learning to obtain semantic representations that are invariant to non-semantic factors. A gradient-reversal mechanism is employed to suppress non-semantic variations explicitly within the SSL models, thereby refining the learned representations. The proposed adversarial learning approach effectively disentangles content from non-semantic factors, leading to robust semantic representations. Experimental results confirm that the proposed approach enhances the ability of speech processing models to generalize across different acoustic conditions while preserving the linguistic information.

Bio:
Varun Krishna is a PhD scholar at the Department of Electrical Engineering, Indian Institute of Science Bengaluru. He obtained his B.Tech from the Department of Electronics and Communications from NITK, Surathkal, in 2017. Later completed his M.Tech in Signal Processing from the Department of Electrical Engineering, Indian Institute of Science, Bengaluru, in 2019. His research interests include self-supervised representation learning, large language models, and generative AI.

Thesis Defense (Online)
2025-03-19 16:00 - 17:30 | Online, India
Title: Parallel Algorithms for Efficient Utilization of Multiprocessor Architectures for Transient Stability
Student: Francis C Joseph
Faculty Advisor: Dr. Gurunath Gurrala.
Examiner: Prof Saikat Chakrabarti, IIT Kanpur
Date : 19th March 2025
Time: 4 PM – 5.30 PM
Mode: ONLINE
TEAMS LINK
ABSTRACT:
Computer hardware capabilities have been enormously increasing over the years. Multi-core processors, graphic processing units (GPUs), and field programmable gate array (FPGA) accelerators have grown significantly recently. They have opened new computational paradigms such as edge computing, fog computing, grid computing, distributed computing, cloud computing, and exascale supercomputing. However, efficiently utilising most of these computational paradigms in traditional engineering disciplines, such as power engineering, is challenging. In this thesis, efficient algorithms for multiprocessor-based high-performance computing and edge computing platforms for two power system applications are developed, power system stability assessment and power quality measurements respectively. Faster than real-time transient stability assessment of large power grids using time domain simulations with detailed models is computationally challenging. Today, the commercial tools used for this application in Energy Management Systems (EMS) worldwide rely on parallel batch processing methods, which don’t efficiently utilise the architecture of the computational paradigms. For transient stability simulations, this thesis explores a time parallel algorithm, Parareal in Time, which belongs to a class of temporal decomposition methods for time parallel solutions of differential equations. Two effective implementation approaches, Master Worker and Distributed, are analysed for large systems, and scaling tests are performed using a state space model with a Message Passing Interface (MPI) in a multiprocessor environment. One of the findings was that the performance of the Parareal depends on the accuracy and the computational cost of the coarse solver used for initialisation and subsequent correction steps. A potential coarse solver, Modified Euler (ME), a well-known solver for transient stability simulations even in commercial packages, has been explored to adapt its step size by controlling the Local Truncation Error (LTE) to achieve the desired accuracy. An LTE estimator using a Multistage Homotopy Analysis Method (MHAM), which gives an approximate solution to a set of non-linear equations in the form of a power series, is proposed to control the LTE at each integration step to enable adaptation of the ME step size. The proposed MHAM-assisted adaptive ME solver is faster and has comparable accuracy to the conventional fixed and adaptive Modified Euler solver for large systems’ transient stability simulations. Since MHAM is lighter than the ME solver and the LTE estimate is sufficient for step size adaptation, an adaptive MHAM coarse solver is proposed for the Parareal. However, MHAM provides a non-zero auxiliary parameter `c’ to select a family of solutions. Hence, an optimisation framework is also proposed to automatically select this parameter based on the system’s dynamics. Based on many case studies on test systems of different sizes, it is found that maintaining the LTE lower than the Parareal convergence tolerance improves the speedup of the Master-Worker paradigm; however, for the distributed implementation, maintaining LTE higher than the convergence tolerance gives improved speedup. An approach to include unscheduled events which arise in power system operation due to the operation of protective relays is also proposed for Parareal. The impact of frequency estimation on Parareal is evaluated using three estimation methods. It was found that the network admittance-based method has the lowest execution time. Many different types of disturbance types are performed on systems of different sizes and see that Parareal can maintain its performance. In Parareal implementation, each coarse time segment is assigned to one processor in the MPI environment. Multiple processors in a node can be assigned to a coarse time segment to improve speedup. Therefore, a shared memory-based space parallel transient stability solver is also considered for further performance enhancement. Space parallelisation of transient stability simulation involves breaking the network into subnetworks and solving each part independently while ensuring the original network’s convergence. Therefore, a Multi Area Thevenin Equivalent (MATE) based parallel solver implementation on a shared memory platform is proposed, and both space parallelisation and task parallelisation are explored. It is shown that the space parallelism can closely match the ideal speedup and can be exceeded by space + task parallelism while the network is well-partitioned. It can be further improved when combined with time parallelism. A hybrid time-space solver using OpenMP MATE, space + task parallelism, and MPI Parareal is proposed using two scheduling schemes: homogeneous and heterogeneous for both communication paradigms. The homogeneous scheduling enabled a faster-than-real time solution even for the PEGASE 13659 bus system and provided multiple combinations to achieve it. The heterogeneous can increase the performance of the hybrid solver when homogeneous scheduling is unavailable. A particular case for Hybrid Master with a single core worker was used to showcase the initialisation phase’s time reduction by reducing the coarse solver’s computational time. The current state-of-the-art chips also provide multicore architectures for edge computing applications. One such low-cost, open-source, heterogeneous, resource-constrained hardware platform is called Parallella. The unique hardware architecture of the Parallella provides many edge computing resources in the form of a Zynq SoC (dual-core ARM + FPGA) and a 16-core co-processor called Epiphany. This Parallella device was used as a measurement device for edge computing applications research in smart grids, and it could sample 3 voltages and four currents at a 32 kHz sampling rate. The thesis explores one application of such a device to measure the harmonics and compute various Power Quality (PQ) indices. A parallel implementation of multichannel FFT on Epiphany for the streaming data is developed in this regard. Epiphany 16-core architecture has very limited memory resources, and the order in which the cores are to be accessed significantly impacts the execution. Proper decomposition of the FFT algorithm tasks and scheduling the tasks for efficient core and memory usage are crucial, requiring a good understanding of the Epiphany architecture. The obtained PQ measurements from the proposed implementation are comparable to those of a commercial power analyser.

EE Talk: Cybersecurity for the Power Grid in the AI Age - 7th March 3PM, MMCR
2025-03-07 15:00 - 17:00 | Multi-Media Class Room (MMCR), EE Department (Hybrid mode)
IEEE PES Student Branch Chapter, IISc and POWERGRID Center of Excellence in Cyber Security (PGCoE) is pleased to invite you for a technical talk by Prof. Manimaran Govindarasu, Iowa State University, USA. The technical talk details are as follows.

Title: Cybersecurity for the Power Grid in the AI Age
Venue: C-241, MMCR, 1st floor, Electrical Engineering Department
Date and Time: 07th March 2025, 03:00 PM IST
Mode: Hybrid (Online and Offline). MS Team link
Talk Abstract: Power grid is a complex cyber-physical system (CPS) that forms the lifeline of our modern society. Reliable, secure, and resilient operation of nation’s energy infrastructure is of paramount importance to national security and economic wellbeing. In recent years, there has been a growing trend of cyber threats/attacks, both in numbers and sophistication, targeting critical infrastructure systems around the globe (e.g., Stuxnet, Ukraine power grid attacks, and Colonial Pipeline attack). This evolving cyber threat landscape, coupled with the leveraging of AI tools by the adversaries, underscores the importance and urgency for CPS security solutions that go beyond the traditional IT cybersecurity by leveraging grid’s cyber-physical properties and harnessing the power of AI models to be able to prevent, detect, and mitigate stealthy cyber attacks. This talk will present an overview of cybersecurity threats to critical energy infrastructures, then it will present a holistic life-cycle model for CPS security with some illustrative example solutions for attack prevention, detection, and mitigation. The talk will also briefly discuss CPS security testbeds for attack-defense evaluations and then conclude with some future research directions.

Speaker Bio: Manimaran Govindarasu is on the faculty of Iowa State University since 1999, and he currently holds the titles of Anson Marston Distinguished Professor in Engineering and Harploe Professor in Electrical and Computer Engineering. Prior to joining Iowa State, he received his Ph.D. in Computer Science and Engineering from Indian Institute of Technology, Madras (Chennai). His research experience includes Cybersecurity for the Smart Grid and Critical Infrastructures, and Real-time Systems and Networks. He has co-authored over 300 peer-reviewed research publications, received multiple conference best paper awards, presented several dozen conference invited talks, tutorials, and industry short-courses, hands-on training sessions, and mentored over 50 graduate students for their dissertation/thesis research. He is currently serving as the Chair of Cybersecurity Working Group for Power Grid in IEEE Power & Energy Society and has served as an Associate Editor and guest co-editor for several flagship IEEE publications. His research is supported over the years by US NSF, DOE, DHS, and DOD. He is a Fellow of the IEEE and an ABET Program Evaluator.

EE PhD Defense: Infimal Convolution Based Regularization for Image recovery
2025-02-27 14:00 - 16:00 | Multi-Media Class Room (MMCR), EE Department (Hybrid mode)
Student : Deepak G Skariah
Advisor : Prof. Muthuvel Arigovindan
Title : Infimal Convolution Based Regularization for Image recovery
Date and Time: 27.02.2025 (Thursday), 2 pm.
Venue : MMCR, Department of Electrical Engineering
Meeting link
Thesis examiners: Prof. Kedar Khare, Prof. Naren Nayak
Defense examiner: Prof. Kedar Khare
Abstract
The quality of image captured by acquisition devices has increased drastically over the years largely due to a revolution in imaging sensor capability. But, image acquisition under low illumination continues to be a bottleneck for imaging devices such as optical microscopes leading to blurred and noisy images. A potential solution to this limitation is a computational approach known as image restoration. An image restoration algorithm recovers an estimate of the original image from a noisy blurred observation while assuming a knowledge of the image degradation model. The restoration problem is even more challenging when it comes to a spatio-temporal signal as a good restoration scheme needs to be mindful of presence of motion in the measured signal. This means that in spatio-temporal signal restoration problem, the algorithm should ensure temporal regularity of restored signal in addition to spatial regularity. Regularization based image restoration attempts to pose image restoration problem as a regularized optimization problem from the measured signal. We propose to exploit the concept of infimal convolution from convex analysis to design effective and efficient restoration schemes for images and spatio-temporal images.
In our first work, we address the problem of regularization design. We propose a family of derivative based regularization which we call generalized unitary invariant regularization and it belongs to class of infimal convolution based functionals. We also design an algorithmic scheme to optimize the resultant optimization problem. We demonstrate the quality of proposed algorithm and restoration scheme through multiple experiments on simulated data.
In our second work, we address the restoration of spatio-temporal images measured from TIRF microscopes where a sequence of noisy blurred images are observed over time. We once again exploit the infimal convolution based approach to design a novel spatio-temporal regularizer that is tailor made for above class of signals. The proposed regularization was designed to ensure both spatial and temporal regularity of restored signal. The resultant regularization functional is defined as an optimization problem where the cost is a weighted sum of two constituent functions where the two functions play the role of promoting spatial and temporal regularity respectively. We also design an algorithm to optimize the resultant restoration problem using this regularization. We demonstrate the quality of the proposed algorithm by testing the restoration quality against spatio-temporal measurements collected from TIRF microscopes.
In the third and final work we address the problem of estimating the relative weights in spatio-temporal regularization functional designed based on infimal convolution formulation. We propose a renewed optimization model where the spatio-temporal signal is estimated together with the better quality image estimate by incorporating the weights as part of the optimization problem. We also design an iterative scheme to optimize the resultant joint optimization model. We demonstrate the effectiveness of this scheme against other joint optimization schemes for spatio-temporal signal estimation.

EE faculty colloquium
2025-02-21 16:00 - 17:30
Title: Power Electronics – A Technology Enabler for a Carbon-free Energy Pathway
Speaker: Dr. Vinod John, Dept. of Electrical Engineering, Indian Institute of Science
Venue: MMCR, EE
Meeting Link (for online audience)
Time: 4 pm, 21 Feb 2024

Abstract:
Power electronics technologies play a pivotal role in efficiently transferring electrical energy from sources and storage elements to loads while minimizing power losses. These technologies are critical for optimizing the utilization of renewable energy sources, enhancing the efficiency of storage systems, and reducing energy wastage—all of which are essential in the global effort to achieve minimal CO₂ emissions. In this talk, I will begin with an introduction to the fundamentals of power electronics, highlighting key research challenges and discussing solutions developed in the Power Electronics Group at the Department of Electrical Engineering, IISc. Specific focus areas include power converters, switching devices, input and output filtering components, and the control of power conversion systems. I will try to summarize the research efforts over time and indicate a few practical applications of power electronics in real-world scenarios.

Speaker’s Bio:
Dr. Vinod John is a Professor in the Department of Electrical Engineering at the Indian Institute of Science (IISc), Bengaluru. He earned his Ph.D. from the University of Wisconsin–Madison and subsequently worked at GE Research, New York, and Northern Power Systems, Vermont, before joining IISc. His research interests encompass
power electronics, switched-mode power conversion, distributed energy resources, and energy storage systems.

Talk on the four generations of single-neuron models: From the perceptron to the complex adaptive system
2025-02-17 15:00 - 17:00 | MMCR, Hall C 241, 1st floor, EE department
Talk on The four generations of single-neuron models: From the perceptron to the complex adaptive system
by Professor Rishikesh Narayanan, Molecular Biophysics Unit, Indian Institute of Science, Bengaluru 560012
Venue: Multimedia Classroom (MMCR), EE Department, IISc
Date & Time: February 17, 2025, 3 PM (Coffee will be served at 2.45 PM)
The key objective of this talk is to foster interdisciplinary AI research by way of understanding the recent advances in Neuroscience and leveraging them for building superior AI models that are closer to natural intelligence.

Abstract:
The first generation of single-neuron models treated neurons as perceptrons or integrate-and-fire devices, involving some form of summation that was followed by a nonlinearity. This class of models originated in the early 1900s with the law of dynamic polarization laying the conceptual foundation. The 1950s introduced the second generation of models with Hodgkin and Huxley’s ground-breaking use of ordinary differential equations to describe action potential dynamics. This second era emphasized the nonlinear dynamical systems framework to capture ionic interactions underlying neuronal functions. The third era, beginning in the early 1990s, incorporated spatial complexity into single-neuron models by acknowledging dendrites as active participants in neural computation. Patch-clamp electrophysiology facilitated discoveries of active conductances in dendrites, leading to models based on coupled partial differential equations spanning entire dendritic structures. By the early 2000s, variability among neurons of the same subtype highlighted the need for models beyond a single archetype. This ushered in the fourth generation of models, where single neurons are recognized as complex adaptive systems. Complex systems are systems where several functionally specialized subsystems interact to yield collective functional outcomes, and are defined by two key attributes. First, the interactions among subsystems of a complex system are neither fully determined nor completely random. This intermediate level of randomness is characterized by network motifs — subnetworks that appear more frequently than expected in random networks. The second defining feature of complex systems is degeneracy, where multiple combinations of distinct subsystems can achieve the same collective function. The complex systems framework unifies earlier models, highlighting dynamic and adaptive interactions among specialized subsystems to explain collective neuronal function.

About Rishi: Rishi earned his Ph.D. from the Department of Electrical Engineering at the Indian Institute of Science, Bangalore (Advisor: Prof. Y. V. Venkatesh). After that, he held two postdoctoral positions, the first at the National Centre for Biological Sciences, Bangalore (Advisor: Prof. Sumantra Chattarji), and the second at the University of Texas at Austin (Advisor: Prof. Daniel Johnston). He returned to the Institute in July 2009. He is currently a Professor at the Molecular Biophysics Unit of the Institute.

Hosts: Chandra Sekhar Seelamantula (EE) & Chiranjib Bhattacharyya (CSA)

Title: Tight Frames, Non-convex Regularizers, and Quantized Neural Networks for Solving Linear Inverse Problems
2025-02-13 15:30 - 17:00 | Online, India
Name of the Candidate: Mr. Nareddy Kartheek Kumar Reddy

Research Supervisor: Prof. Chandra Sekhar Seelamantula

Examiner: Prof. Subhasis Chaudhuri, EE Dept., IIT Bombay

Date and time: February 13, 2025; 3.30 PM

Meeting Link

Title: Tight Frames, Non-convex Regularizers, and Quantized Neural Networks for Solving Linear Inverse Problems

Abstract:
The recovery of a signal/image from compressed measurements involves formulating an optimization problem and solving it using an efficient algorithm. The optimization objective involves data fidelity, which is responsible for ensuring conformity of the reconstructed signal to the measurement, and a regularization term to enforce desired priors on the signal. More recently, the optimization based solvers have been replaced by deep neural networks.

This thesis considers three aspects of inverse problems in computational imaging: (i) Choice of data-fidelity term for compressed-sensing image recovery; (ii) Non-convex regularizers in the context of linear inverse problems; and (iii) Explainable deep-unfolded networks and the effect of quantization of model parameters.

Part-1: Tight-Frame-Based Data Fidelity for Compressed Sensing
The choice of the sensing matrix is crucial in compressed sensing. Random Gaussian sensing matrices satisfy the restricted isometry property, which is crucial for solving the sparse recovery problem using convex optimization techniques. However, tight-frame sensing matrices result in minimum mean-squared-error recovery given oracle knowledge of the support of the sparse vector. If the sensing matrix is not tight, could one achieve the recovery performance assured by a tight frame by suitably designing the recovery strategy? This is the key question addressed in this part of the thesis. We consider the analysis-sparse l1-minimization problem with a generalized l2-norm-based data-fidelity and show that it effectively corresponds to using a tight-frame sensing matrix. The new formulation offers improved performance bounds when the number of non-zeros is large. One could develop a tight-frame variant of a known sparse recovery algorithm using the proposed formalism. We solve the analysis-sparse recovery problem in an unconstrained setting using proximal methods. Within the tight-frame sensing framework, we rescale the gradients of the data-fidelity loss in the iterative updates to further improve the accuracy of analysis-sparse recovery. Experimental results show that the proposed algorithms offer superior analysis-sparse recovery performance. Proceeding further, we also develop deep-unfolded variants, with a convolutional neural network as the sparsifying operator. On the application front, we consider compressed sensing image recovery. Experimental validations on Set11, BSD68, Urban100, and DIV2K datasets show that the proposed techniques outperform the state-of-the-art techniques, where the performance is measured in terms of peak signal-to-noise ratio (PSNR) and structural similarity index metric (SSIM).

Part 2: Proximal Averaging Methods for Image Restoration and Recovery
Sparse recovery methods are iterative and most techniques typically rely on proximal gradient methods. While the commonly used sparsity promoting penalty is the l1-norm, which is convex, alternatives such as the minimax concave penalty (MCP) and smoothly clipped absolute deviation (SCAD) penalty have also been employed to obtain superior results. Combining various penalties to achieve robust sparse recovery is possible, but the challenge lies in optimal parameter selection. Given the connection between deep networks and unrolling of iterative algorithms, it is possible to unify the unfolded networks arising from different formulations. We propose an ensemble of proximal networks for sparse recovery, where the ensemble weights are learnt in a data-driven fashion. The proposed network performs superior to or on par with the individual networks in the ensemble for synthetic data under various noise levels and sparsity conditions. We demonstrate an application to image denoising based on the convolutional sparse coding formulation.

Part 3: Deep Unfolded Networks, Quantization, and Explainability
Deep-unfolded networks (DUNs) have set new performance benchmarks in compressed sensing and image restoration. DUNs are built from conventional iterative algorithms, where an iteration is transformed into a layer/block of a network with learnable parameters. This work focuses on enhancing the explainability of DUNs by investigating potential reasons behind their superior performance over traditional iterative methods. Our findings reveal that the learned matrices in DUNs are unstable because their singular values exceed unity. However, the overall DUN gives rise to a recovery accuracy higher than the optimisation techniques. This goes to show that although the linear/affine components of the DUN are unstable, the overall network is stable, which leads us to conclude that it is the nonlinearities, more precisely, the activation functions, that are responsible for restoring stability. This study illustrates an intriguing property of deep unfolded networks, which is not observed in standard optimization schemes.

We also consider quantization of the network weights for efficient model deployment in resource-constrained devices. Quantization makes neural networks efficient both in terms of memory and computation during inference and also renders them compatible with low-precision hardware deployment. Our learning algorithm is based on a variant of the ADAM optimizer in which the quantizer is part of the forward pass. The gradients of the loss function are evaluated corresponding to the quantized weights while doing a book-keeping of the high-precision weights. We demonstrate applications for compressed image recovery and magnetic resonance image reconstruction. The proposed approach offers superior reconstruction accuracy and quality than state-of-the-art unfolding techniques, and the performance degradation is minimal even when the weights are subjected to extreme quantization.

Impact of the research: The novel techniques proposed in this thesis led to improved accuracy in linear inverse problems — sparse signals recovery, compressed image recovery, image deconvolution, and image denoising. The tight-frame based algorithms require fewer iterations to converge, thus reducing the reconstruction time. The quantized neural networks, on the other hand, improved the inference time and reduced the model footprint for efficient deployment on the edge. Analysis of deep-unfolded networks has shown that the learnt weights follow a Gaussian distribution suggesting more efficient initialisation schemes than weights derived from ISTA. We also identified potential local instabilities in a deep learning setting, which are avoided in a conventional optimization setting. The role of the nonlinearity is to restore stability. The analysis showed that while deep unfolded networks have potential instabilities, they can be useful for solving inverse problems.

About the Candidate:
Nareddy Kartheek Kumar Reddy is the 13th PhD student to graduate from the Spectrum Lab, Department of Electrical Engineering at the Indian Institute of Science (IISc). He received a Bachelor of Technology (Honors) degree from Indian Institute of Technology Kharagpur in 2016. Subsequently, he worked as a Senior Engineer at Honeywell Technology Solutions from 2016 to 2018, where he focused on developing device drivers for SD card and NAND Flash devices which went into production in Honeywell’s flagship weather radar RDR7000.

Kartheek joined IISc as a Masters student in Signal Processing, and subsequently upgraded to PhD after receiving the prestigious Prime Minister’s Research Fellowship in 2019. He is twice recipient of the Qualcomm Innovation Fellowship, once in 2020 & again in 2023.

Talk: Modelling the Switching Dynamics of Advanced Power Semiconductor Devices: From Silicon Superjunction to Wide Bandgap Technologies
2025-02-11 15:00 - 16:00 | MMCR, Hall C 241, 1st floor, EE department
Title: Modelling the Switching Dynamics of Advanced Power Semiconductor Devices: From Silicon Superjunction to Wide Bandgap Technologies
Speaker: Manish Mandal
Date: Tuesday, Feb 11, 2025
Time: 3:00-4:00 pm
Venue: MMCR
Abstract:
The advancement of power semiconductor devices has significantly transformed modern power conversion systems, enabling notable enhancements in energy efficiency, system miniaturization, and overall performance. Among the emerging technologies, silicon superjunction MOSFETs (Si SJMOS), silicon carbide (SiC) MOSFETs, and gallium nitride (GaN) high-electron-mobility transistors (HEMTs) have gained prominence in applications such as renewable energy systems, electric vehicles, and commercial power supplies. While these devices are commonly available in the 600-650 V range, SiC MOSFETs extend to higher voltage ratings of 1200-1700 V, making them well-suited for high-power applications.
In power electronic converters, power semiconductor devices incur switching losses during transitions between their on and off states. Advances in device technology have reduced junction capacitance, resulting in faster switching transients and lower losses. However, these improvements also introduce challenges such as oscillations in gate and power loops, increased electromagnetic interference (EMI), crosstalk, false turn-on events, and heightened device stress due to the amplified influence of circuit parasitics. Therefore, an in-depth understanding of switching dynamics is crucial for optimizing device performance and mitigating these issues.
This thesis presents a comprehensive investigation into the switching dynamics of advanced power semiconductor technologies (Si SJMOS, SiC MOSFETs, and GaN HEMTs). The study employs circuit-based simulations and mathematical modeling to estimate critical performance parameters, including switching losses, slew rates of voltage (dv/dt), and current (di/dt), transition times, and voltage overshoots.
The study begins with developing a mathematical model to characterize the switching transients of Si SJMOS in combination with SiC Schottky barrier diodes (SBDs), which mitigate reverse recovery losses. The model employs a nonlinear channel current formulation based on the Nth power law, effectively capturing the current characteristics in both the ohmic and saturation regions. Additionally, piecewise nonlinear models are introduced for the gate-drain and drain-source capacitances of Si SJMOS and the reverse-biased capacitance of SiC SBDs. The accuracy of the model is validated using experimental results for three pairs of Si SJMOS and SiC SBD.
The investigation then extends to wide bandgap (WBG) devices, focusing on GaN HEMTs and SiC MOSFETs rated at 600-650 V. A detailed model is developed for GaN HEMTs, incorporating nonlinear channel current behavior, junction capacitances, and parasitic effects. Experimental results for 650 V, 33 A GaN HEMT validate the accuracy of the model. To represent the switching transients of 650 V SiC MOSFETs, the existing models originally designed for 1200 V devices are adapted and refined. The model is validated through experimental results for a 650 V, 30 A SiC MOSFET.
A comparative analysis is then conducted to evaluate the switching performance of 650 V power semiconductor devices, including Si SJMOS, SiC MOSFETs, and multiple GaN HEMT technologies (e-GaN, GaN GIT, and Cascode GaN). Devices with similar voltage (600-650 V) and current (30 A) ratings are assessed in terms of switching losses, transition times, (dv/dt, di/dt), and voltage overshoots, offering valuable insights into device selection for single-phase applications.
Further, the study explores the impact of packaging on the switching behavior of SiC MOSFETs, particularly in Kelvin-source (TO-247-4) configurations. A detailed model is developed that integrates nonlinear channel current characteristics, capacitance models, and circuit parasitic effects. The model is experimentally validated using a 1.2 kV SiC MOSFET. A comparison between TO-247-3 and TO-247-4 packages is also presented, highlighting the impact of packaging on switching performance.
In addition, an improved model is proposed to predict crosstalk dynamics in SiC MOSFETs. The model incorporates a nonlinear channel current formulation, parasitic inductances from the package and PCB, and parasitic capacitances due to PCB layout. These enhancements improve the prediction of (dv/dt)-induced gate-source voltages and the dynamics of false turn-on events. Experimental results for two 1200 V SiC MOSFETs validate the model’s effectiveness. An optimized negative gate voltage and gate resistance design is also proposed to minimize negative gate-source voltage peaks and mitigate false turn-on.
Finally, the thesis investigates partial hard turn-on dynamics of SiC MOSFETs in a half-bridge configuration. The study identifies the minimum load current required for zero-voltage switching and quantifies switching losses associated with partial hard turn-on transitions. The findings reveal that these losses deviate significantly from the traditional (1/2)CV2 loss model. Experimental validation is performed using two 1.2kV SiC MOSFETs with varying current ratings.

Talk on High-frequency Integrated Magnetics for High-performance Computing.
2025-01-28 15:00 - 17:00 | MMCR, Hall C 241, 1st floor, EE department
Title:
High-frequency Integrated Magnetics for High-performance Computing.

Speaker: Ranajit Sai, Tyndall National Lab

Date and Time: 28th January 2025, Tuesday 3 pm

Venue: MMCR EE

Abstract:
Power management for high performance processors, SoCs and AI engines is evolving from Point of Load (POL) on-board DC-DC converters to in-package granular power delivery network (PDN). Granular PDN with integrated magnetics enables independently regulated per-core power delivery to match its power utilization profile within each workload, thus reducing power overhead significantly and as a result enhancing system-level efficiency significantly. While the main role of the integrated inductor devices in a integrated voltage regulator remain same – to have sufficient inductance to filter the fundamental switching signal and have sufficient bandwidth to filter out the unwanted switching harmonics up to a certain frequency, the form-factor and placement of these devices may vary significantly across applications. In addition, these inductors must not saturate at the converter’s peak current, while having lowest possible power loss over the entire operating range of the converter. Finally, the magnetic component is expected to take as little space as possible – especially in the light of 3D integration, height of the device is equally important to the footprint. The key question here is how to evaluate and compare integrated and embedded inductor devices for a certain voltage converter application. It is a daunting task even when the effect of temperature and electromagnetic interference (EMI) are not considered.

This presentation will capture various efforts made by researchers over the past decade and the key technological trend of integrating high-frequency magnetic devices in 3D IC package. Furthermore, key research and development scope in integrated magnetics will be highlighted.

Speaker’s bio:
Ranajit Sai is a Senior Researcher and Technical Lead of the Integrated Magnetics Research Group in Tyndall National Institute, Ireland. He is driving design and development of futuristic on-silicon integrated thin-film magnetics and in-package embeddable magnetics for powering datacenter processors and AI engines. He’s leading research projects funded by leading industries, research consortiums, and Govt. agencies. His research is driven by probing novel physical phenomena, tailoring material properties, and solving technological bottlenecks through innovation in material development, device design and integration strategies.

Prior to joining Tyndall in 2022, Ranajit spent four years in Japan as an Asst. Professor at Tohoku University in Sendai, and subsequently another four years in India as a Visiting Professor at Indian Institute of Science (IISc) in Bengaluru. He received his PhD in 2014 from Indian Institute of Science (IISc), India. To date, Ranajit has published his work in 40+ journal/conference papers, filed 5 patents, and presented in more than 45 international conferences that include the flagship conferences organized by IEEE Magnetics Society, IEEE Power Electronics Society, and American Institute of Physics.

Talk on Wearable Sensor Signal Processing and Data Analytics for Health Applications
2025-01-24 12:00 - 13:00 | MMCR, Hall C 241, 1st floor, EE department
Title: Wearable Sensor Signal Processing and Data Analytics for Health Applications
by
Professor Gaurav Sharma
Department of Electrical and Computer Engineering & Department of Computer Science
University of Rochester
Venue: Multimedia Classroom, EE, IISc
Time: 12 noon to 1 PM on (Friday) 24th January 2025. Coffee will be served at 11.45 AM.
Abstract
Advances in nano-fabrication and MEMS devices have led to radical improvements in sensing technologies in recent years. These improvements are most visible to all of us in our SmartPhones that already feature a panoply of miniaturized sensors. Many of the same sensors are also positively impacting several other application domains. In this talk, we highlight how smart light-weight body worn sensors are set to revolutionize healthcare and the practice of medicine by providing technologies for assessing biomarkers for physiological and physical attributes related to disease condition, treatment effectiveness, and longitudinal progression. In contrast with the subjective, sporadic in-clinic assessments that are in common use today, body-worn sensors can provide objective and repeatable measurements and based on extended periods of continuous monitoring. We present examples from our recent and ongoing research that features light-weight, low-power sensors that can be affixed to the body like adhesive temporary tattoos, in a diverse set of health monitoring applications including quantification of movement disorders for Parkinson’s and Huntington’s diseases, stroke rehabilitation, and cardiac monitoring. We present examples of signal processing and data analytics for these applications that effectively exploit the sensor measurements. Finally, we highlight ongoing and emerging directions for research and development.
Speaker Biography
Gaurav Sharma is a professor in the Departments of Electrical and Computer Engineering, Computer Science, and Biostatistics and Computational Biology, and a Distinguished Researcher in Center of Excellence in Data Science (CoE) at the Goergen Institute for Data Science at the University of Rochester. He received the PhD degree in Electrical and Computer engineering from North Carolina State University, Raleigh in 1996. From 1993 through 2003, he was with the Xerox Innovation group in Webster, NY, most recently in the position of Principal Scientist and Project Leader. His research interests include data analytics, cyber physical systems, signal and image processing, computer vision, and media security; areas in which he has 56 patents and has authored over 220 journal and conference publications. He served as the Editor-in-Chief for the IEEE Transactions on Image Processing from 2018 through 2020, and for the Journal of Electronic Imaging from 2011 through 2015. He is a member of the IEEE Publications, Products, and Services Board (PSPB) and chaired the IEEE Conference Publications Committee in 2017-18. He is the editor of the Digital Color Imaging Handbook published by CRC press in 2003. Dr. Sharma is a fellow of the IEEE, a fellow of SPIE, a fellow of the Society for Imaging Science and Technology (IS&T) and has been elected to Sigma Xi, Phi Kappa Phi, and Pi Mu Epsilon. In recognition of his research contributions, he received an IEEE Region I technical innovation award in 2008 and the IS&T Bowman award in 2021. Dr. Sharma served as a 2020-2021 Distinguished Lecturer for the IEEE Signal Processing Society.

Host: Chandra Sekhar Seelamantula, EE, IISc.

Talk on Voltage Monitoring and Control of Active Distribution Systems
2025-01-21 11:00 - 13:00 | Multi-Media Class Room (MMCR), EE Department (Hybrid mode)
Speaker:
Prof Anamitra Pal
School of Electrical, Computer, and Energy Engineering
Arizona State University (ASU), USA

Date: 21st January 2025, 11:30 AM

Venue: C 241, MMCR, Electrical Engg Dept, IISc

Abstract: Residential solar photovoltaic (PV) systems are integral for achieving the carbon neutral goals for 2050. At the same time, power utilities, who are responsible for the reliability and stability of the electric distribution grid, are often unaware of the extent of behind-the-meter solar PV penetration. In the absence of real-time visibility and adequate control, the increasing proliferation of residential PV systems can play havoc with the distribution feeder voltage. Consequently, there is a genuine need to closely monitor and control the voltage over the entire length of the feeder.
This talk will describe how system-wide information obtained from a select few real-time sensors using machine learning can be used to optimize reactive power regulation for achieving coordinated, robust, and fast voltage control of active distribution systems. To ensure trust in the machine learning-based approach, formal guarantees of performance will also be established. The talk will conclude by demonstrating additional system-wide benefits that an integrated approach towards monitoring and control provides to power utilities responsible for operating large, complex distribution grids.

Short Biography: Anamitra Pal is an Associate Professor in the School of Electrical, Computer, and Energy Engineering at Arizona State University (ASU). His research interests include data analytics with a special emphasis on time-synchronized measurements, artificial intelligence-applications in power systems, renewable generation integration studies, and critical infrastructure resilience. Dr. Pal has received numerous accolades including the 2018 Young CRITIS Award for his contributions to the field of critical infrastructure protection, the 2019 Outstanding Young Professional Award from the IEEE Phoenix Section, the National Science Foundation CAREER Award in 2022, and the Centennial Professorship Award from ASU in 2023.

Colloquium on Modelling, Analysis and Control of Switched Reluctance Motors
2025-01-17 16:00 - 17:30 | MMCR, Hall C 241, 1st floor, EE department
Speaker: THIRUMALASETTY MOULI . of Ph.D. (Engg) in Electrical Engineering under Electrical Engineering
Date/Time: Jan 17 / 16:00:00
Location: Multi Media Class Room (MMCR), EE Department
Research Supervisor: Narayanan G
Abstract:
Switched reluctance machine (SRM) is known for many advantages such as permanent magnet-free operation, robust structure, low rotor inertia, low manufacturing cost, and excellent fault-tolerant capability. Hence, SRM has been adopted in many applications such as, electric vehicles, aerospace, and robotics. Nonlinear characteristics and pulsations in torque developed are well-known problems, rendering modelling and control of the SRM challenging. This thesis focuses on the modelling, characterization and control of switched reluctance machines. Current, torque, and speed control are all part of the scope of study. Conventionally rotors with laminations are used in SRM. In certain applications where the shaft temperature increases very significantly, the thermal expansion of the different constituent materials in a typical laminated would be at different rates. This creates stress in the rotor assembly and could reduce the reliability of the machine. Hence, in such applications, rotors made from a single piece of magnetic material are potential candidates. Solid-rotor and recently proposed slitted-rotor SRMs are prospective candidates for high temperature applications. However, research on solid- and slitted-rotor SRMs remains relatively limited. In this thesis, solid and slitted rotor SRMs are systematically compared through comprehensive 3D transient finite element analysis (FEA) and experimental evaluations under both static and dynamic conditions. Blocked rotor experiments and 3D finite element analyses reported show that the slitted-rotor SRM has lower core loss and higher torque density than the solid-rotor SRM. High torque density is essential for applications such as electric vehicles and aerospace systems. This thesis compares several methods to enhance laminated-rotor SRMs torque density through FEA simulations. Various magnetic structure-based techniques, including multi-toothed stators, tapered poles, non-uniform air gaps, flux barriers, and segmental rotors, are analyzed. Additionally, the performance of two winding configurations—double-layer conventional (DLC) and double-layer mutually coupled (DLMC)—is compared under unipolar and bipolar excitations, respectively. The DLMC winding concept is applied to solid- and slitted-rotor SRMs to enhance torque output. These machines are reconfigured from conventional windings to a DLMC configuration. Due to the absence of existing literature on mutually coupled solid- and slitted-rotor SRMs, FEA simulations and extensive blocked-rotor experiments are conducted to evaluate their performance under bipolar current excitation. Comparative analysis with conventionally wound counterparts reveals a significant enhancement in torque characteristics achieved through the DLMC winding connection. Two new current control schemes are proposed in this research work. In the first part, an extended horizon model-based predictive current controller is proposed for SRM. An analytical equation is reported for real-time computation of the optimal duty ratio to minimize the RMS error between the future current references and predicted currents over a horizon. The proposed controller demonstrates lower RMS error in current tracking and robustness to parameter variations, with experimental validation on a laboratory prototype drive, over an existing dead-beat predictive controller. Further, a fixed-frequency, model-independent predictive current control for SRM is proposed. Unlike traditional approaches, this method does not require any pre-measured characteristics of the SRM. Instead, it only requires two constants: the optimal value of equivalent inductance and the moving average window period. Hence this method eliminates the need for time consuming characterization experiments, multi-dimensional lookup tables, and offline curve fitting to model the flux-linkage characteristics of the SRM for current control. A high-performance torque control scheme for SRMs is presented, incorporating a PI controller, feedforward compensation, high-frequency compensation, and optimized gating functions. This controller achieves significant reduction in pulsating torque and outperforms state-of-the-art techniques across various operating conditions. Further improvement in performance is achieved through a novel PWM-based optimal predictive direct torque control scheme. In this work, a cost function, encompassing the instantaneous torque error and the RMS values of phase currents is formulated to be minimized. An analytical expression for the optimal duty ratio towards this objective is derived resulting in improved computational efficiency. This controller delivers improved torque tracking, higher torque per ampere, and lower sound pressure levels compared to existing methods. A novel experimental method for determining the combined moment of inertia and frictional torque characteristics of an SRM coupled to a load, utilizing a low torque ripple controller. The identified mechanical parameters are leveraged to develop a systematic design procedure for a PI-based speed controller, achieving fast speed reference tracking and robust disturbance rejection. The controller’s effectiveness is validated through simulations and experiments, demonstrating its effectiveness in improving SRM drive performance.

Talk : Renewable Energy Integration to Electric Grid: Modeling and Analysis
2025-01-02 10:00 - 11:00 | MMCR, Hall C 241, 1st floor, EE department
Sukumar Kamalasadan, Professor, Department of Electrical and Computer Engineering, The University of North Carolina at Charlotte, Charlotte, NC 28223
This lecture series mainly focuses on modeling Inverter Based Resources (IBRs) for small signal stability studies. Small signal modeling methods, modeling of relevant control architectures, and the overall system level security and stability analysis are discussed considering both transmission and distribution systems. The course sequence is divided into three parts: a) Part 1: small-signal modeling of inverters, b) Part 2: modeling of control architectures, and c) Part 3: Modeling of advance control architectures and system-level considerations.

Colloquium on Design and Performance Optimization of Power Converters for Energy Storage Systems
2024-12-31 03:00 - 16:00 | MMCR, Hall C 241, 1st floor, EE department
PhD Thesis Colloquium
Title: Design and Performance Optimization of Power Converters for Energy Storage Systems
Speaker: P. Roja
Date: Tuesday, Dec 31, 2024
Time: 3.00pm-4.00pm
Venue: MMCR – EE
Abstract:
Energy shortages and power outages have emerged as critical concerns in the contemporary energy landscape, exacerbated by escalating energy demands and the global imperative towards clean energy and decarbonization. Addressing these challenges necessitates the deployment of energy storage systems (ESS) to mitigate both long- and short-duration outages, coupled with the integration of renewable energy sources through power converter interfaces. While battery-based ESS are conventionally employed for short-term blackouts, this work focuses on developing ultracapacitor (UC)-based ESS tailored for pulsed power applications, chosen for their inherent high-power density and superior lifecycle characteristics. The research also investigates isolated DC-DC converters, specifically phase-shifted full-bridge (PSFB) topology, opted due to its constant frequency operation and inherent soft-switching features.
This research encompasses the optimization of UC stack sizing and power converter design for specific contingency requirements. The inherent non-linear behavior of UCs is analyzed, leading to the development of a framework for accurately characterizing the effective UC stack capacitance. This framework is utilized to propose a systematic design procedure that optimizes the discharge ratio and iteratively selects stack parameters, minimizing the overall system cost.
Furthermore, the research investigates PSFB converter for both low and high-power applications. A comprehensive analysis of the PSFB topology is conducted, examining the influence of various circuit parameters, including transformer parasitics and device capacitances, on converter operation and the design trade-offs. This analysis culminates in the development of a two-level loss-optimal iterative design algorithm that determines a unique set of design parameters across a wide range of specifications.
For high-power applications, the research explores a modular system of PSFB converters configured in an input parallel output parallel (IPOP) topology. Recognizing the limitations of traditional equal power-sharing schemes, this work proposes an asymmetrical module design coupled with a Lagrangian loss-optimal load-sharing control technique to enhance system efficiency. This approach enables the system to operate with high efficiency across the entire load range, effectively managing both fixed and dynamic loads.
The efficacy of modeling, analysis and the proposed design algorithms for the UC stack and the PSFB converter, including its modular configurations, is validated through experimental verification on 1-3kW hardware prototypes.

Colloquium on Low-Complexity Classification of Patients with Amyotrophic Lateral Sclerosis from Healthy Controls: Exploring the Role of Hypernasality
2024-12-19 12:00 - 13:00
NAME OF THE STUDENT :  Anjali Jayakumar
DEGREE REGISTERED   :     M. Tech. (Research)
DATE AND DAY   :     19th December, 2024, THURSDAY
TIME   :     12:00 PM
VENUE   :     EE, MMCR
Teams meeting link      :     https://tinyurl.com/2zckabj2
T I T L E
Low-Complexity Classification of Patients with Amyotrophic Lateral Sclerosis from Healthy Controls: Exploring the Role of Hypernasality
Abstract:
Amyotrophic Lateral Sclerosis (ALS) is a progressive neurodegenerative disorder characterized by motor neuron degeneration, leading to muscle weakness, atrophy, and speech impairments. Dysarthria, a motor speech disorder, is an early symptom in approximately 30% of ALS patients, with hypernasality—excessive nasal resonance due to velopharyngeal dysfunction—observed in around 73.88% of individuals with bulbar-onset ALS. These speech impairments significantly hinder communication and affect patients’ quality of life. Current ALS monitoring methods, including clinical assessments, genetic testing, electromyography (EMG), and magnetic resonance imaging (MRI) can be time-consuming and invasive, whereas speech-based approaches provide a non-invasive and efficient alternative for continuous monitoring. However, the lack of large ALS-specific speech datasets hinders the development of reliable models. This study aims to develop a simplified, low-complexity model to distinguish ALS speech from healthy control (HC) speech, exploring the role of hypernasality for effective classification. By leveraging hypernasality as an indicator of ALS, the study seeks to develop machine learning models that train on healthy speech data, avoiding the need for large amounts of ALS speech data. Ultimately, the study aims to develop a low-complexity classification method for classifying ALS patients from HC subjects using their speech.
The study begins by simplifying deep learning models, transitioning from complex Convolutional Neural Networks (CNNs) and Bidirectional Long Short-Term Memory (BiLSTM) architectures to simpler Deep Neural Networks (DNNs) of varying complexity. These models are trained using Mel Frequency Cepstral Coefficients (MFCCs), along with their deltas and double-deltas. Additionally, various temporal statistics of the MFCCs and their derivatives are explored to reduce feature dimensionality, thereby decreasing model complexity in terms of the number of model parameters and Floating-Point Operations (FLOPs), resulting in reduced computational cost. The study then investigates the presence of hypernasality in ALS speech of varying dysarthria severity, as well as the HC speech, using HuBERT representations and a DNN model trained on healthy speech for nasal vs. non-nasal phoneme classification. Finally, the study integrates hypernasality in ALS speech into the ALS vs. HC classification by training a model for nasal vs. non-nasal phoneme classification using only healthy speech data. The model then classifies ALS vs. HC speech, with ALS treated as the nasal class and HC as the non-nasal class, demonstrating its effectiveness in distinguishing ALS speech from HC speech, while also validating the potential of simplified DNN models for the classification.
The results show that reduced-complexity DNN models can outperform CNN-BiLSTM models, achieving up to 5.67% and 6.59% higher classification accuracies for Spontaneous Speech (SPON) and Diadochokinetic Rate (DIDK) tasks, respectively, with a significant reduction in the number of model parameters by 99.99% and FLOPs by 99.60%. Dimensionality reduction minimizes complexity, with a further reduction of 94.59% in the number of model parameters and 94.61% in FLOPs, resulting in minimal accuracy loss of 1.76% for SPON and 5.17% for DIDK. Analysis of hypernasality across varying ALS severity levels reveals that individuals with severe dysarthria exhibit the highest levels of nasalized speech, followed by those with mild dysarthria, with normal ALS speech and healthy controls showing the lowest levels. This finding is validated with manually annotated nasality scores. Hypernasality proves to be an effective indicator for distinguishing ALS from HC, achieving up to 66.48% and 81.46% accuracy for SPON and DIDK tasks, respectively, with low-complexity models.

EE Talk: The Role of Distribution System Operators (DSOs) in Enabling Integration and Orchestrating Coordinated Operation of DERs
2024-12-16 16:00 - 17:00 | Multi-Media Class Room (MMCR), EE Department (Hybrid mode)
Title: The Role of Distribution System Operators (DSOs) in Enabling Integration and Orchestrating Coordinated Operation of DERs
Time and Date: 4 PM to 5 PM, Monday 16 December 2024
Mode: Hybrid Mode
Join the meeting now
Venue: MMCR, 1st Floor, EE, IISc
Abstract: The electricity landscape is undergoing significant changes due to the proliferation of distributed energy resources (DERs), and increasingly smart consumers (prosumers), proactively managing their local consumption and generation – through intelligent devices like smart thermostats, solar panels, and batteries energy storage systems. Recent advances in information & communication technologies, and smart metering, provide strategic opportunities for prosumers to reform their conventional energy practices towards more consumer-centric economies. From an operational perspective, managing power distribution networks is becoming more difficult with such active grid-edge systems providing limited to no visibility or control. Towards addressing these challenges, distribution network operators are broadening the scope of their roles and deepening their operational reach to become Distribution System Operators (DSOs) to accommodate a high penetration of DERs, coordinate the DER flexibility and ensure reliable and quality supply to end consumers. In this context, this seminar will discuss some DSO coordination strategies for enabling DERs to actively participate in local as well as system-wide management tasks along with some modelling and simulation capabilities towards analyzing the system-level impacts of implementing such coordination mechanisms.
A person wearing glasses and a pink shirt
Description automatically generatedBio: Dr. Monish Mukherjee (M’ 21) received his B.E. degree from the Department of Electrical Engineering, Jadavpur University, Kolkata, India in 2016 and his Ph.D. degree in Electrical and Computer Engineering from Washington State University, Pullman, WA, in 2021. He is currently a research scientist & engineer at Pacific Northwest National Laboratory (PNNL), USA. He also holds an adjunct faculty appointment at Washington State University in Pullman. In PNNL, he leads the development of the Resilience Applications for Transactive Energy Systems. He also leads an effort for developing distribution resource planning and DER coordination mechanisms for the state of Vermont, USA along with some ongoing ADMS-related efforts in PNNL. His research interests include transactive energy systems, distribution system modelling and simulation, grid resiliency and condition monitoring of high voltage power equipment.
________________________________________________________________________________
Join the meeting now
Meeting ID: 485 337 297 291
Passcode: [REDACTED]

PhD Defense
2024-11-11 15:00 - 17:00 | Multi-Media Class Room (MMCR), EE Department (Hybrid mode)
NAME OF THE STUDENT: Meenu Jayamohan
DEGREE REGISTERED : PhD
ADVISOR : Dr. Sarasij Das
DATE : 11th November 2024
TIME : 3:00 PM
VENUE : C 241, MMCR, Electrical Engg Dept
Meeting Link : Click Here for Link

———————————————————————————————-
Title: Power Swing Blocking Protection in Presence of Large Scale Grid Following PV Generation
——————————————————————————–
Abstract:
The penetration of Inverter-Based Resources (IBRs) is increasing in power grids due to environmental concerns. The fault behaviour of IBR is quite different than that of Synchronous Generators (SGs). In addition, IBRs usually do not have inherent inertia. As a result, the existing protection schemes, which are traditionally developed for SG-dominated systems, can become ineffective. Stable power swings (SPS) and Unstable Power Swings (UPS) caused by oscillations generated during system disturbances may trigger undesired relay operations. Power swing Blocking (PSB) and Out-of-Step Tripping (OST) techniques have been employed to stop distance relays from malfunctioning during SPS and UPS, respectively. PSB schemes commonly use the magnitude of the rate of change of positive sequence impedance (|dZ/dt|) for SPS detection. This research work focuses on the PSB protection issues in the
presence of large-scale Grid-Following (GFOL) PV generation. A modified IEEE-39 bus system is used for all the studies presented in this thesis.

As the converter controls determine how PV generators behave during transients, the behaviour of SGs used in conventional power systems differs significantly from that of PVs. As a result, existing protection methods, including PSB methods, must be modified to protect the IBR-integrated power systems. This work examines how integrating GFOL PV generation affects power swing impedance (Z) trajectories and |dZ/dt|. The research reveals that the
GFOL PV systems can significantly alter the Z trajectories observed during power swings compared to that of an SG-dominated system. The results presented demonstrate that the penetration of GFOL PV may increase the speed of Z trajectories and, hence, |dZ/dt|, which may, in turn, cause maloperations of the PSB and OST functions. The findings emphasize the critical need to revisit and potentially adapt existing PSB and OST schemes to account for the growing presence of IBRs in power grids.

In the GFOL control strategy, the injected power is controlled with respect to the grid voltages measured at the terminal by the Phase-Locked Loop (PLL). Considering a PLL bandwidth in the range of 2−15 Hz for a weak grid, the PLL dynamics play a significant role in the power swing dynamics. In this work, the impact of various types and control parameters of PLLs on |dZ/dt| and Z trajectories are analyzed using mathematical analysis. Synchronous Reference Frame PLL with additional Low pass filter (LSRF PLL), Multiple Reference Frame (MRF) PLL and Dual Second-Order Generalized Integrator (DSOGI) PLL are used for the study. The impacts of varying penetration of PV and relay locations are also investigated. This study shows that the PLL parameters and bandwidth influence the operation/maloperation of the PSB during SPS.

During Fault Ride-Through (FRT), the PV system can provide additional reactive power to the grid to maintain the voltage at its terminals. This is achieved through the dynamic voltage or reactive power support and is provided in proportion to the drop in terminal voltage using the K-factor. The study also highlights the importance of considering the active power recovery rate to mitigate the oscillatory behaviour of IBR during the fault recovery process. The findings reveal that, following fault removal, the dynamic behaviour of inverters would be significantly influenced by both the K-factor and the active power recovery rate, which may affect the power swing characteristics. This work emphasizes the need for a comprehensive understanding of how dynamic voltage support features and active power recovery interact with the power swing dynamics and influence PSB operation.

Auto-Reclosing (AR) of a circuit breaker is a technique that attempts to re-energize the faulted line after a predetermined time delay. While IEEE Std C37.104-2012 provides guidelines for minimum AR dead time based on arc de-ionization, these may not be sufficient for grids with a high penetration of IBRs. This work explores how varying the three-phase AR dead time can influence the severity of power swings that may occur after consecutive Low-Voltage Ride-Through (LVRT) events in a GFOL PV plant. This finding highlights the potential need to revise
existing minimum AR dead time standards for grids with high IBR penetration levels to ensure reliable system operation.

The studies presented in the previous sections show that existing impedance-based PSB methods might fail in the presence of GFOL PV generation. The lack of inherent inertia of the GFOL PV is one of the reasons behind the increased |dZ/dt| which may cause maloperation of the existing impedance-based PSB schemes. Hence, a novel PSB method is proposed, which uses nodal inertia to re-evaluate the |dZ/dt| values. The effectiveness of the proposed method is verified for both the SG-dominated system and the GFOL PV-integrated system using PSCAD simulations.

[Talk] End-to-End Modeling for Abstractive Speech Summarization, Dr Roshan Sharma, Google USA, November 8 (today), 2-3 pm
2024-11-08 14:00 - 15:00 | MMCR, Hall C 241, 1st floor, EE department
TITLE: End-to-End Modeling for Abstractive Speech Summarization

TIME AND VENUE: MMCR, EE, C241, 2:00-3:00 pm

ABSTRACT
In our increasingly interconnected world, where speech remains the most intuitive and natural form of communication, spoken language processing systems face a crucial challenge: they must do more than just categorize speech, they need to truly understand it to generate meaningful responses. One key aspect of this understanding is speech summarization, where a system condenses the important information from spoken input into a concise summary.

In this talk, I will discuss our work on end-to-end modeling for abstractive speech summarization, and expound on our work in long-context modeling, multi-stage training, open source datasets and benchmarks, and finally studies about the impact of various factors on human annotations.

SPEAKER BIO:
Roshan Sharma is a Research Scientist with Google in New York, USA. He earned his Ph.D. in March 2024 from Carnegie Mellon University, USA for his thesis titled “End-to-End Modeling for Abstractive Speech Summarization”. He has diverse experiences across multiple areas of speech and language processing, including speech recognition, spoken language understanding, noise suppression, multimodal machine learning, and more recently in large-scale foundation models.

Talk on Design of a Robust Power Hardware-in-the-Loop Interface Controller and an Enhanced Droop Control for Seamless Transfer
2024-11-07 15:30 - 17:00 | MMCR, Hall C 241, 1st floor, EE department
Title: Design of a Robust Power Hardware-in-the-Loop Interface Controller and an Enhanced Droop Control for Seamless Transfer

Speaker:
Dr. Soham Chakraborty
Postdoctoral Researcher
Energy Systems Integration Facility,
National Renewable Energy Laboratory,
Golden, Colorado, USA 80401
Date: 7th November 2024, 3:30 PM

Venue: C 241, MMCR, EE Dept, IISc
Join the meeting now

Abstract:
In the first part of the talk, the challenges of synthesizing an interface between the hardware and software components of PHIL will be discussed and talked about from a modern control perspective for managing inherent uncertainties. The proposed robust PHIL interface controller based on mu-synthesis ensures multiple objectives that includes robust stability, performance, accuracy, and tracking capabilities. To assess the effectiveness and viability, a PHIL experiment is conducted that involves interfacing an emulated software system based on a 1-φ, 225-bus, 110V, 60Hz, 1MW residential sub-network of the University of Minnesota and suburban Minneapolis interfaced with multiple hardware under tests.

In the second part of the talk, a seamless transition strategy using a single and unified mode-dependent droop-controlled grid-forming inverters will be discussed. Seamless recovery of power to critical infrastructures, after grid failure, is a crucial need arising in scenarios that are increasingly becoming more frequent. The proposed control strategy regulates the output active and reactive power by the inverters to a desired value while operating in on-grid mode; seamless transition and recovery of power injections into the load after grid failure by inverters that operates in grid-forming mode all the time; and requires only a single bit of information on the grid/network status for the mode transition. A hardware experiment is conducted with two 3-φ, 480-V, 125-kVA grid-forming inverters, a 3-φ, 480-V, 270-kVA grid simulator, a physical grid switch, and a physical load bank.

Short Biography:
Soham Chakraborty received the B.E. degree from Bengal Engineering and Science University, Shibpur, India, in 2013, the M.Tech. degree from the
Indian Institute of Technology, Mumbai, India, in 2016, and the PhD degree from the the University of Minnesota, Minneapolis, MN, USA in 2023; all in electrical engineering. The title of his PhD thesis was “Robust Dynamic Resilient Power Grids Enabled By Modern Control Framework”.
He is currently working as a Post-Doctoral Fellow at the Energy Systems Integration Facility, National Renewable Energy Laboratory, USA from 2023.

[Talk] 7 Nov, 3:30 PM, Dr. Soham Chakraborty, NREL, USA
2024-10-29 15:30 - 17:30 | MMCR, Hall C 241, 1st floor, EE department
Title: Design of a Robust Power Hardware-in-the-Loop Interface Controller and an Enhanced Droop Control for Seamless Transfer
Speaker:
Dr. Soham Chakraborty
Postdoctoral Researcher
Energy Systems Integration Facility,
National Renewable Energy Laboratory,
Golden, Colorado, USA 80401
Date: 7th November 2024, 3:30 PM
Venue: C 241, MMCR, EE Dept, IISc
Abstract:

In the first part of the talk, the challenges of synthesizing an interface between the hardware and software components of PHIL will be discussed and talked about from a modern control perspective for managing inherent uncertainties. The proposed robust PHIL interface controller based on mu-synthesis ensures multiple objectives that includes robust stability, performance, accuracy, and tracking capabilities. To assess the effectiveness and viability, a PHIL experiment is conducted that involves interfacing an emulated software system based on a 1-φ, 225-bus, 110V, 60Hz, 1MW residential sub-network of the University of Minnesota and suburban Minneapolis interfaced with multiple hardware under tests.
In the second part of the talk, a seamless transition strategy using a single and unified mode-dependent droop-controlled grid-forming inverters will be discussed. Seamless recovery of power to critical infrastructures, after grid failure, is a crucial need arising in scenarios that are increasingly becoming more frequent. The proposed control strategy regulates the output active and reactive power by the inverters to a desired value while operating in on-grid mode; seamless transition and recovery of power injections into the load after grid failure by inverters that operates in grid-forming mode all the time; and requires only a single bit of information on the grid/network status for the mode transition. A hardware experiment is conducted with two 3-φ, 480-V, 125-kVA grid-forming inverters, a 3-φ, 480-V, 270-kVA grid simulator, a physical grid switch, and a physical load bank.

Short Biography:
Soham Chakraborty received the B.E. degree from Bengal Engineering and Science University, Shibpur, India, in 2013, the M.Tech. degree from the
Indian Institute of Technology, Mumbai, India, in 2016, and the PhD degree from the the University of Minnesota, Minneapolis, MN, USA in 2023; all in electrical engineering. The title of his PhD thesis was “Robust Dynamic Resilient Power Grids Enabled By Modern Control Framework”.
He is currently working as a Post-Doctoral Fellow at the Energy Systems Integration Facility, National Renewable Energy Laboratory, USA from 2023.

Ph.D. Thesis Colloquium
2024-10-28 11:00 - 13:00 | MMCR, Hall C 241, 1st floor, EE department
PhD Thesis Colloquium
Name of the Candidate: Kalla Jayateja
Research Supervisor: Soma Biswas
Date and Time: October 28, 2024, Monday, 11:00 AM
Venue: C-241, First Floor, Multimedia Classroom (MMCR), EE
Title: Class Incremental Learning Across Diverse Data Paradigms
Abstract: In recent years, deep learning has achieved remarkable success in various domains, largely due to its ability to learn from vast amounts of data. However, traditional deep learning models struggle in scenarios where new classes are introduced over time, requiring retraining from scratch or facing catastrophic forgetting of previously learned information. This limitation underscores the need for class incremental learning (CIL), a continual learning paradigm that enables models to adapt incrementally to new classes without losing prior knowledge. CIL is crucial in real-world scenarios, such as autonomous driving and healthcare diagnostics, where new data emerges continuously. Traditional CIL approaches often rely on idealized assumptions of balanced, fully labeled, and abundant datasets, which rarely hold true in practice. In reality, CIL models must handle dynamic environments like class imbalance, limited supervision, and data scarcity. This thesis tackles these issues by proposing novel methods tailored to diverse CIL scenarios, emphasizing flexibility and robustness. We now describe the various CIL scenarios studied as part of this thesis.
Firstly, we introduce the Generalized Semi-Supervised Class Incremental Learning (GSS-CIL) protocol, designed for scenarios with limited labeled data and abundant unlabeled data. In semi-supervised learning, the quality of pseudo-labels plays a critical role. To address this challenge within the CIL framework, we propose the Expert Suggested Pseudo-Labelling Network (ESPN), which utilizes an expert model to generate high-quality pseudo-labels from the unlabeled data at each incremental step, ensuring a more robust learning process.
In many practical applications, the number of samples per class can vary significantly, leading to long-tailed distributions where a few classes are well-represented, while most others are under-represented. This motivates the need for addressing long-tailed learning in CIL which stems from the inherent imbalance in real-world data distributions. We address this problem through a two-stage framework called Global Variance-Driven Classifier Alignment (GVAlign), where the first stage involves learning robust feature representations using Mixup loss. In the second stage, the classifiers are aligned by leveraging global variance with class prototypes, enabling learning robust representations even for under-represented classes. GVAlign can be seamlessly integrated into existing CIL approaches to effectively handle the long tailed data distributions.
In the next part, we address the Few-Shot Class Incremental Learning (FSCIL) scenario, where there are only a handful of examples available for each class. We address the two key challenges of FSCIL, namely overfitting and catastrophic forgetting, through the proposed method, Self-Supervised Stochastic Classifier (S3C). In order to learn robust feature representations in the limited data regime and prevent overfitting, we leverage self-supervised objectives. Specifically, we train the feature extractor for the rotation prediction task. We observe that the network learnt in a self-supervised manner mitigates catastrophic forgetting in the incremental stages. We also propose to replace the conventional deterministic classifiers with stochastic classifiers, where classifiers are sampled from a learnable distribution. This further aids the model in generalizing better to new classes and mitigates overfitting, thereby improving performance in FSCIL scenarios.
In addition to addressing these specific CIL scenarios, this thesis also focuses on the development of generalized methods that are adaptable across the variety of CIL scenarios and the amount of data supervision. Given the diversity inherent in incremental learning, a single method may not suffice for all scenarios. We demonstrate that a straightforward self-supervision strategy can significantly enhance performance across multiple CIL tasks, enabling our models to remain adaptable without the need for task-specific modifications. This approach, being modular in nature, can be seamlessly integrated with new techniques as they emerge.
In the final part of this thesis, we propose a unified approach to address CIL across varying levels of supervision, from few-shot to high-shot settings. By harnessing the rich representational capabilities of large-scale pre-trained models, our method effectively handles the challenges posed by differing levels of supervision, ensuring robust performance in both low-shot and high-shot CIL scenarios.

Faculty Colloquium: Demystifying Large Language Models - Capabilities, Challenges and Opportunities
2024-10-18 16:00 - 17:30 | EE, MMCR
Title: Demystifying Large Language Models – Capabilities, Challenges and Opportunities
Speaker: Dr. Sriram Ganapathy, Associate Professor, Dept of Electrical Engineering, Indian Institute of Science
Venue: MMCR, EE
Team Link
Time: 4pm, 18 Oct 2024
Abstract:
In the last two years, large language models (LLMs) have taken giant leaps in tackling real world problems ranging from reasoning, coding, creative content generation and multimodal understanding. This has resulted in significant user growths in services like chatGPT and Gemini. In this talk, I will give a brief overview of i) what goes under the hood in developing these models, ii) what their current capabilities are, iii) who are the big players and iv) what are the potential challenges and blindspots. Along the way, I will also touch upon some of the theory that allows basic understanding of how the LLMs achieve their capabilities. The talk will end with a discussion of bias, safety and regulatory considerations in the development and deployment of these models.
Speaker’s Bio:
Sriram Ganapathy is an Associate Professor at the Electrical Engineering, Indian Institute of Science, Bangalore, where he leads the activities of the Learning and Extraction of Acoustic Patterns (LEAP) lab. He is also a visiting research scientist at Google Research India, Bangalore. Prior to joining the Indian Institute of Science, he was
a research staff member at the IBM Watson Research Center, Yorktown Heights, USA. He received his Doctor of Philosophy from the Center for Language and Speech Processing, Johns Hopkins University. He obtained
his Bachelor of Technology from College of Engineering, Trivandrum, India and Master of Engineering from the Indian Institute of Science, Bangalore. He has also worked as a Research Assistant in Idiap Research
Institute, Switzerland. Dr. Ganapathy currently serves as the IEEE Sigport Chief Editor, member of the IEEE Education Board, and functions as subject editor for Elsevier Speech Communication Journal. He is also a recipient of multiple awards including Department of Science and Technology (DST) Early Career Award in India, Department of Atomic Energy (DAE), India Young Scientist Award and Verisk AI Faculty Award.

PhD Thesis Colloquium on Solid-State Point-on-Wave Fault Creator with Adjustable Transient Recovery Voltage
2024-10-18 11:00 - 12:00 | MMCR, Hall C 241, 1st floor, EE department
Title: Solid-State Point-on-Wave Fault Creator with Adjustable Transient Recovery Voltage
Student: Rajesh K B
Faculty Advisor: Dr. Gurunath Gurrala.
Date : 18th October 2024
Time: 11 AM – 12 PM
Venue: MMCR, EE, IISc, 1st Floor
ABSTRACT:
The power grid is changing with the exponentially growing penetration of inverter-based resources (IBRs). Keeping the power grid stable, reliable, and secure, and delivering quality power has become increasingly important in recent years. As a result, many countries have devised grid codes for operating IBRs. Grid codes specify the requirements for IBRs to stay connected to the grid during various grid conditions, such as short circuit faults. As a result, a variety of devices are being developed to create grid short-circuit fault conditions. In addition to validating grid codes, devices capable of generating accurate and realistic fault transients are highly desirable for developing effective protection countermeasures, testing relay algorithms, studying fault characteristics in IBRs, and performing parameter estimation of power system components. Existing converter-based fault creators require high bandwidth control to provide an adjustable transient recovery voltage (TRV) feature. Providing this feature in the existing PWFCs utilizing FQSes is also difficult due to multiple over-voltage clamping circuits. The time series data generated during faults in power systems is essential for the development and validation of data-driven algorithms for power systems anomaly detection, classification, and mitigation.
This thesis explores the design of a point-on-wave fault creator (PWFC) with an adjustable transient recovery voltage feature. The developed PWFC can create all types of balanced and unbalanced faults at any desired angle on the voltage waveform (point-on-wave). Over-voltage protection is essential for solid-state switches in fault creators while clearing the fault. Existing fault creators using FQS, use one or two capacitors/surge protection devices per FQS for over-voltage protection. Hence fault creators with ‘N’ FQSes need ‘N’ or ‘2N’ capacitors, which increases the number of capacitors used in the fault creator, making it costly and bulky. In contrary to this, the PWFC topology in the author’s master thesis uses a single capacitor to protect all FQSes from overvoltage. A systematic analytical procedure to select the single capacitor value, adjustable transient recovery voltage feature, and a finite state machine (FSM) for PWFC control is developed in this thesis. The performance of the FQS and the PWFC are investigated under a wide range of test scenarios including thermal considerations and parasitic components. The ability of the selected capacitor to protect the FQSes during all types of fault clearances is experimentally validated by creating faults in an experimental test bed using the PWFC prototype. A novel FQS topology is proposed that can be realized using two commercially available half-bridge semiconductor modules. With this unique method of FQS realization, the lowest package count (Two), lowest on-state drop (one active switch plus one diode), modularity and scalability of the structure, gate control, and minimal package inter-connection length are simultaneously achieved. An adjustable TRV feature is achieved using a variable output voltage pre-charge circuit as a cost-effective solution. An algorithm is proposed to obtain the initial capacitor voltage required to limit the TRV to a specified target value. The experimental results demonstrated the ability of the PWFC to adjust the TRV for all fault configurations as per the test requirements.
A combined fault and power quality disturbance detection and classification method using symbolic dynamic filtering (SDF) is also developed. An SDF is constructed based on the symbolic encoding of time series data and finite state automata to generate steady-state probability distribution vectors (histograms) as signature patterns for different fault categories and power quality events. It provides an edge over existing methodologies as it compresses voluminous fault data into fixed-length probability distributions, which serve as the feature vectors for classifiers. Irrespective of the length of the time series data or the number of coefficients of the transformation used, the feature vector’s length is fixed in SDF. A new sinusoidally distributed partitioning (SDP) scheme is proposed for symbolic encoding. The proposed methodology can detect and classify low-impedance faults, high-impedance faults, and power quality disturbances. Support vector machines and k-nearest neighbor classifiers are explored for fault classification using the histograms. The proposed methodology is tested on two active distribution systems, the modified IEEE 33 and 13 bus systems. In addition to fault detection and classification, a data-driven method is proposed to identify the hardware signature of Intelligent Electronic Devices (IED) used in power grids. It utilizes test function data of the analog-to-digital converter (ADC) used in the IED. A credit card-sized Parallella board and ADC of a custom IED platform are utilized to obtain the hardware signature. A finite state machine is developed in the FPGA of the Parallella processor to control the ADC for generating different data sets to extract signature
Acknowledgments:

Fund for Improvement of Science and Technology (FIST) Program, Department of Science and Technology (DST), India, through the project “Smart Energy Systems Infrastructure Hybrid Test Bed,” under Grant SR/FST/ETII-063/2015 (C) and (G)
POWERGRID Center of Excellence in Cyber Security (PGCoE), IISc
Department of Science and Technology, India, under the Indo-Danish collaboration project, Data-Driven Control and Optimization for a Highly Efficient Distribution Grid (ID-EDGE), No. DST-1390-EED

PhD Thesis Colloquium
2024-10-14 11:00 - 12:00 | Online, India
Title: Parallel Algorithms for Efficient Utilization of Multiprocessor Architectures for Transient Stability
Student: Francis C Joseph
Faculty Advisor: Dr. Gurunath Gurrala.
Date :14th October 2024
Time: 11 AM – 12 PM
ONLINE TEAMS LINK
ABSTRACT:
Computer hardware capabilities have been enormously increasing over the years. Multi-core processors, graphic processing units (GPUs), and field programmable gate array (FPGA) accelerators have grown significantly recently. They have opened new computational paradigms such as edge computing, fog computing, grid computing, distributed computing, cloud computing, and exascale supercomputing. However, efficiently utilising most of these computational paradigms in traditional engineering disciplines, such as power engineering, is challenging. In this thesis, efficient algorithms for multiprocessor-based high-performance computing and edge computing platforms for two power system applications are developed, power system stability assessment and power quality measurements respectively. Faster than real-time transient stability assessment of large power grids using time domain simulations with detailed models is computationally challenging. Today, the commercial tools used for this application in Energy Management Systems (EMS) worldwide rely on parallel batch processing methods, which don’t efficiently utilise the architecture of the computational paradigms. For transient stability simulations, this thesis explores a time parallel algorithm, Parareal in Time, which belongs to a class of temporal decomposition methods for time parallel solutions of differential equations. Two effective implementation approaches, Master Worker and Distributed, are analysed for large systems, and scaling tests are performed using a state space model with a Message Passing Interface (MPI) in a multiprocessor environment. One of the findings was that the performance of the Parareal depends on the accuracy and the computational cost of the coarse solver used for initialisation and subsequent correction steps. A potential coarse solver, Modified Euler (ME), a well-known solver for transient stability simulations even in commercial packages, has been explored to adapt its step size by controlling the Local Truncation Error (LTE) to achieve the desired accuracy. An LTE estimator using a Multistage Homotopy Analysis Method (MHAM), which gives an approximate solution to a set of non-linear equations in the form of a power series, is proposed to control the LTE at each integration step to enable adaptation of the ME step size. The proposed MHAM-assisted adaptive ME solver is faster and has comparable accuracy to the conventional fixed and adaptive Modified Euler solver for large systems’ transient stability simulations. Since MHAM is lighter than the ME solver and the LTE estimate is sufficient for step size adaptation, an adaptive MHAM coarse solver is proposed for the Parareal. However, MHAM provides a non-zero auxiliary parameter `c’ to select a family of solutions. Hence, an optimisation framework is also proposed to automatically select this parameter based on the system’s dynamics. Based on many case studies on test systems of different sizes, it is found that maintaining the LTE lower than the Parareal convergence tolerance improves the speedup of the Master-Worker paradigm; however, for the distributed implementation, maintaining LTE higher than the convergence tolerance gives improved speedup. An approach to include unscheduled events which arise in power system operation due to the operation of protective relays is also proposed for Parareal. The impact of frequency estimation on Parareal is evaluated using three estimation methods. It was found that the network admittance-based method has the lowest execution time. Many different types of disturbance types are performed on systems of different sizes and see that Parareal can maintain its performance. In Parareal implementation, each coarse time segment is assigned to one processor in the MPI environment. Multiple processors in a node can be assigned to a coarse time segment to improve speedup. Therefore, a shared memory-based space parallel transient stability solver is also considered for further performance enhancement. Space parallelisation of transient stability simulation involves breaking the network into subnetworks and solving each part independently while ensuring the original network’s convergence. Therefore, a Multi Area Thevenin Equivalent (MATE) based parallel solver implementation on a shared memory platform is proposed, and both space parallelisation and task parallelisation are explored. It is shown that the space parallelism can closely match the ideal speedup and can be exceeded by space + task parallelism while the network is well-partitioned. It can be further improved when combined with time parallelism. A hybrid time-space solver using OpenMP MATE, space + task parallelism, and MPI Parareal is proposed using two scheduling schemes: homogeneous and heterogeneous for both communication paradigms. The homogeneous scheduling enabled a faster-than-real time solution even for the PEGASE 13659 bus system and provided multiple combinations to achieve it. The heterogeneous can increase the performance of the hybrid solver when homogeneous scheduling is unavailable. A particular case for Hybrid Master with a single core worker was used to showcase the initialisation phase’s time reduction by reducing the coarse solver’s computational time. The current state-of-the-art chips also provide multicore architectures for edge computing applications. One such low-cost, open-source, heterogeneous, resource-constrained hardware platform is called Parallella. The unique hardware architecture of the Parallella provides many edge computing resources in the form of a Zynq SoC (dual-core ARM + FPGA) and a 16-core co-processor called Epiphany. This Parallella device was used as a measurement device for edge computing applications research in smart grids, and it could sample 3 voltages and four currents at a 32 kHz sampling rate. The thesis explores one application of such a device to measure the harmonics and compute various Power Quality (PQ) indices. A parallel implementation of multichannel FFT on Epiphany for the streaming data is developed in this regard. Epiphany 16-core architecture has very limited memory resources, and the order in which the cores are to be accessed significantly impacts the execution. Proper decomposition of the FFT algorithm tasks and scheduling the tasks for efficient core and memory usage are crucial, requiring a good understanding of the Epiphany architecture. The obtained PQ measurements from the proposed implementation are comparable to those of a commercial power analyser.

Acknowledgments:

SERB Science and Technology Award for Research (SERB-STAR) grant, File No: STR/2020/000019 titled Hybrid Parallel Solvers for Faster than Real-time Transient Stability Analysis of Large Power Grids.

Bosch Research and Technology Centre, Bangalore, India and by the Robert Bosch Centre for Cyber-Physical Systems, Indian Institute of Science, Bangalore, India (under Project E-Sense: Sensing and Analytics for Energy Aware Smart Campus)
DST Young Scientist Grant DST-YSS/2015/001371, India

EE Faculty Colloquium: Development of Parallel Solvers for Bulk Power Systems Time Domain Simulations
2024-09-20 16:00 - 17:30
Title: Development of Parallel Solvers for Bulk Power Systems Time Domain Simulations
Speaker: Dr. Gurunath Gurrala, Associate Professor, Dept of Electrical Engineering, Indian Institute of Science
Venue: MMCR, EE
Time: 4 pm, Friday, 20 September 2024
Abstract:
This talk introduces two different time domain simulation paradigms, phasor domain, and electromagnetic transient simulations, typically used for bulk power systems simulation. It also introduces other simulation approaches explored in the literature and compares computational aspects. Motivates the audience about the need to converge these paradigms due to the penetration of renewable sources. Computational challenges that arise in this convergence will be discussed. Introduces the need for realistic modeling of the practical power systems for cascading failure analysis and associated computing challenges. The need for scalable parallel algorithms to speed up the time domain simulations will be discussed. Introduces efficient PARALLEL algorithms and modeling approaches developed by the PhD students of the Grid Control Automation and Modelling Lab (GridCAM), EE, IISc in the past 5 years.
Speaker’s Bio:
Gurunath Gurrala received B.Tech from S.V.H. College of Engineering, Machilipatnam, in 2001, M.Tech from J.N.T.U. College of Engineering, Anantapur, in 2003 and Ph.D from Indian Institute of Science, Bangalore, India, in 2010. He was an assistant professor in SSN college of engineering, Ongole during 2001-2002 and in Anil Neerukonda Institute of Technology and Sciences (ANITS), Visakhapatnam, during 2003-2005. He was a research engineer in GE Global research, Bangalore during 2010-2012. He was a post doctoral fellow at Texas A&M university, USA during 2012-2013 and at Oak ridge national lab, USA during 2014-2015. He is currently an associate professor at department of electrical engineering, Indian Institute of Science. He is the convener of the Power Grid Center of Excellence, FSID, IISc, funded by POWERGRID Corporation of India Ltd. He received SERB-STAR award 2020, IEEE PES Outstanding Engineer Award 2018, INAE Young Engineer Award 2015. He received Prof DJ Badkas medal for best PhD thesis from Electrical Engineering Department, IISc, Bangalore. His papers received best paper award in ICPS 2019, IEEE General meeting 2015, best poster awards in IEEE industrial society annual meeting 2015 and EEE PES T&D Conference and Exposition 2016. Four of his master students received POSOCO Power System Awards. He is senior member of IEEE and INAE young associate. His research interests include cyber physical system modelling in smart grids, development of realistic testbeds for power system operations, power system stability, grid integration of renewables, Microgrid control, high performance computing applications to power systems, nonlinear and adaptive control of power systems.
