EE

Talk on High-frequency Integrated Magnetics for High-performance Computing.
2025-01-28 15:00 - 17:00 (Asia/Kolkata) | MMCR, Hall C 241, 1st floor, EE department
Title:
High-frequency Integrated Magnetics for High-performance Computing.

Speaker: Ranajit Sai, Tyndall National Lab

Date and Time: 28th January 2025, Tuesday 3 pm

Venue: MMCR EE

Abstract:
Power management for high performance processors, SoCs and AI engines is evolving from Point of Load (POL) on-board DC-DC converters to in-package granular power delivery network (PDN). Granular PDN with integrated magnetics enables independently regulated per-core power delivery to match its power utilization profile within each workload, thus reducing power overhead significantly and as a result enhancing system-level efficiency significantly. While the main role of the integrated inductor devices in a integrated voltage regulator remain same – to have sufficient inductance to filter the fundamental switching signal and have sufficient bandwidth to filter out the unwanted switching harmonics up to a certain frequency, the form-factor and placement of these devices may vary significantly across applications. In addition, these inductors must not saturate at the converter’s peak current, while having lowest possible power loss over the entire operating range of the converter. Finally, the magnetic component is expected to take as little space as possible – especially in the light of 3D integration, height of the device is equally important to the footprint. The key question here is how to evaluate and compare integrated and embedded inductor devices for a certain voltage converter application. It is a daunting task even when the effect of temperature and electromagnetic interference (EMI) are not considered.

This presentation will capture various efforts made by researchers over the past decade and the key technological trend of integrating high-frequency magnetic devices in 3D IC package. Furthermore, key research and development scope in integrated magnetics will be highlighted.

Speaker’s bio:
Ranajit Sai is a Senior Researcher and Technical Lead of the Integrated Magnetics Research Group in Tyndall National Institute, Ireland. He is driving design and development of futuristic on-silicon integrated thin-film magnetics and in-package embeddable magnetics for powering datacenter processors and AI engines. He’s leading research projects funded by leading industries, research consortiums, and Govt. agencies. His research is driven by probing novel physical phenomena, tailoring material properties, and solving technological bottlenecks through innovation in material development, device design and integration strategies.

Prior to joining Tyndall in 2022, Ranajit spent four years in Japan as an Asst. Professor at Tohoku University in Sendai, and subsequently another four years in India as a Visiting Professor at Indian Institute of Science (IISc) in Bengaluru. He received his PhD in 2014 from Indian Institute of Science (IISc), India. To date, Ranajit has published his work in 40+ journal/conference papers, filed 5 patents, and presented in more than 45 international conferences that include the flagship conferences organized by IEEE Magnetics Society, IEEE Power Electronics Society, and American Institute of Physics.

Talk: Modelling the Switching Dynamics of Advanced Power Semiconductor Devices: From Silicon Superjunction to Wide Bandgap Technologies
2025-02-11 15:00 - 16:00 | MMCR, Hall C 241, 1st floor, EE department
Title: Modelling the Switching Dynamics of Advanced Power Semiconductor Devices: From Silicon Superjunction to Wide Bandgap Technologies
Speaker: Manish Mandal
Date: Tuesday, Feb 11, 2025
Time: 3:00-4:00 pm
Venue: MMCR
Abstract:
The advancement of power semiconductor devices has significantly transformed modern power conversion systems, enabling notable enhancements in energy efficiency, system miniaturization, and overall performance. Among the emerging technologies, silicon superjunction MOSFETs (Si SJMOS), silicon carbide (SiC) MOSFETs, and gallium nitride (GaN) high-electron-mobility transistors (HEMTs) have gained prominence in applications such as renewable energy systems, electric vehicles, and commercial power supplies. While these devices are commonly available in the 600-650 V range, SiC MOSFETs extend to higher voltage ratings of 1200-1700 V, making them well-suited for high-power applications.
In power electronic converters, power semiconductor devices incur switching losses during transitions between their on and off states. Advances in device technology have reduced junction capacitance, resulting in faster switching transients and lower losses. However, these improvements also introduce challenges such as oscillations in gate and power loops, increased electromagnetic interference (EMI), crosstalk, false turn-on events, and heightened device stress due to the amplified influence of circuit parasitics. Therefore, an in-depth understanding of switching dynamics is crucial for optimizing device performance and mitigating these issues.
This thesis presents a comprehensive investigation into the switching dynamics of advanced power semiconductor technologies (Si SJMOS, SiC MOSFETs, and GaN HEMTs). The study employs circuit-based simulations and mathematical modeling to estimate critical performance parameters, including switching losses, slew rates of voltage (dv/dt), and current (di/dt), transition times, and voltage overshoots.
The study begins with developing a mathematical model to characterize the switching transients of Si SJMOS in combination with SiC Schottky barrier diodes (SBDs), which mitigate reverse recovery losses. The model employs a nonlinear channel current formulation based on the Nth power law, effectively capturing the current characteristics in both the ohmic and saturation regions. Additionally, piecewise nonlinear models are introduced for the gate-drain and drain-source capacitances of Si SJMOS and the reverse-biased capacitance of SiC SBDs. The accuracy of the model is validated using experimental results for three pairs of Si SJMOS and SiC SBD.
The investigation then extends to wide bandgap (WBG) devices, focusing on GaN HEMTs and SiC MOSFETs rated at 600-650 V. A detailed model is developed for GaN HEMTs, incorporating nonlinear channel current behavior, junction capacitances, and parasitic effects. Experimental results for 650 V, 33 A GaN HEMT validate the accuracy of the model. To represent the switching transients of 650 V SiC MOSFETs, the existing models originally designed for 1200 V devices are adapted and refined. The model is validated through experimental results for a 650 V, 30 A SiC MOSFET.
A comparative analysis is then conducted to evaluate the switching performance of 650 V power semiconductor devices, including Si SJMOS, SiC MOSFETs, and multiple GaN HEMT technologies (e-GaN, GaN GIT, and Cascode GaN). Devices with similar voltage (600-650 V) and current (30 A) ratings are assessed in terms of switching losses, transition times, (dv/dt, di/dt), and voltage overshoots, offering valuable insights into device selection for single-phase applications.
Further, the study explores the impact of packaging on the switching behavior of SiC MOSFETs, particularly in Kelvin-source (TO-247-4) configurations. A detailed model is developed that integrates nonlinear channel current characteristics, capacitance models, and circuit parasitic effects. The model is experimentally validated using a 1.2 kV SiC MOSFET. A comparison between TO-247-3 and TO-247-4 packages is also presented, highlighting the impact of packaging on switching performance.
In addition, an improved model is proposed to predict crosstalk dynamics in SiC MOSFETs. The model incorporates a nonlinear channel current formulation, parasitic inductances from the package and PCB, and parasitic capacitances due to PCB layout. These enhancements improve the prediction of (dv/dt)-induced gate-source voltages and the dynamics of false turn-on events. Experimental results for two 1200 V SiC MOSFETs validate the model’s effectiveness. An optimized negative gate voltage and gate resistance design is also proposed to minimize negative gate-source voltage peaks and mitigate false turn-on.
Finally, the thesis investigates partial hard turn-on dynamics of SiC MOSFETs in a half-bridge configuration. The study identifies the minimum load current required for zero-voltage switching and quantifies switching losses associated with partial hard turn-on transitions. The findings reveal that these losses deviate significantly from the traditional (1/2)CV2 loss model. Experimental validation is performed using two 1.2kV SiC MOSFETs with varying current ratings.

Title: Tight Frames, Non-convex Regularizers, and Quantized Neural Networks for Solving Linear Inverse Problems
2025-02-13 15:30 - 17:00 | Online, India
Name of the Candidate: Mr. Nareddy Kartheek Kumar Reddy

Research Supervisor: Prof. Chandra Sekhar Seelamantula

Examiner: Prof. Subhasis Chaudhuri, EE Dept., IIT Bombay

Date and time: February 13, 2025; 3.30 PM

Meeting Link

Title: Tight Frames, Non-convex Regularizers, and Quantized Neural Networks for Solving Linear Inverse Problems

Abstract:
The recovery of a signal/image from compressed measurements involves formulating an optimization problem and solving it using an efficient algorithm. The optimization objective involves data fidelity, which is responsible for ensuring conformity of the reconstructed signal to the measurement, and a regularization term to enforce desired priors on the signal. More recently, the optimization based solvers have been replaced by deep neural networks.

This thesis considers three aspects of inverse problems in computational imaging: (i) Choice of data-fidelity term for compressed-sensing image recovery; (ii) Non-convex regularizers in the context of linear inverse problems; and (iii) Explainable deep-unfolded networks and the effect of quantization of model parameters.

Part-1: Tight-Frame-Based Data Fidelity for Compressed Sensing
The choice of the sensing matrix is crucial in compressed sensing. Random Gaussian sensing matrices satisfy the restricted isometry property, which is crucial for solving the sparse recovery problem using convex optimization techniques. However, tight-frame sensing matrices result in minimum mean-squared-error recovery given oracle knowledge of the support of the sparse vector. If the sensing matrix is not tight, could one achieve the recovery performance assured by a tight frame by suitably designing the recovery strategy? This is the key question addressed in this part of the thesis. We consider the analysis-sparse l1-minimization problem with a generalized l2-norm-based data-fidelity and show that it effectively corresponds to using a tight-frame sensing matrix. The new formulation offers improved performance bounds when the number of non-zeros is large. One could develop a tight-frame variant of a known sparse recovery algorithm using the proposed formalism. We solve the analysis-sparse recovery problem in an unconstrained setting using proximal methods. Within the tight-frame sensing framework, we rescale the gradients of the data-fidelity loss in the iterative updates to further improve the accuracy of analysis-sparse recovery. Experimental results show that the proposed algorithms offer superior analysis-sparse recovery performance. Proceeding further, we also develop deep-unfolded variants, with a convolutional neural network as the sparsifying operator. On the application front, we consider compressed sensing image recovery. Experimental validations on Set11, BSD68, Urban100, and DIV2K datasets show that the proposed techniques outperform the state-of-the-art techniques, where the performance is measured in terms of peak signal-to-noise ratio (PSNR) and structural similarity index metric (SSIM).

Part 2: Proximal Averaging Methods for Image Restoration and Recovery
Sparse recovery methods are iterative and most techniques typically rely on proximal gradient methods. While the commonly used sparsity promoting penalty is the l1-norm, which is convex, alternatives such as the minimax concave penalty (MCP) and smoothly clipped absolute deviation (SCAD) penalty have also been employed to obtain superior results. Combining various penalties to achieve robust sparse recovery is possible, but the challenge lies in optimal parameter selection. Given the connection between deep networks and unrolling of iterative algorithms, it is possible to unify the unfolded networks arising from different formulations. We propose an ensemble of proximal networks for sparse recovery, where the ensemble weights are learnt in a data-driven fashion. The proposed network performs superior to or on par with the individual networks in the ensemble for synthetic data under various noise levels and sparsity conditions. We demonstrate an application to image denoising based on the convolutional sparse coding formulation.

Part 3: Deep Unfolded Networks, Quantization, and Explainability
Deep-unfolded networks (DUNs) have set new performance benchmarks in compressed sensing and image restoration. DUNs are built from conventional iterative algorithms, where an iteration is transformed into a layer/block of a network with learnable parameters. This work focuses on enhancing the explainability of DUNs by investigating potential reasons behind their superior performance over traditional iterative methods. Our findings reveal that the learned matrices in DUNs are unstable because their singular values exceed unity. However, the overall DUN gives rise to a recovery accuracy higher than the optimisation techniques. This goes to show that although the linear/affine components of the DUN are unstable, the overall network is stable, which leads us to conclude that it is the nonlinearities, more precisely, the activation functions, that are responsible for restoring stability. This study illustrates an intriguing property of deep unfolded networks, which is not observed in standard optimization schemes.

We also consider quantization of the network weights for efficient model deployment in resource-constrained devices. Quantization makes neural networks efficient both in terms of memory and computation during inference and also renders them compatible with low-precision hardware deployment. Our learning algorithm is based on a variant of the ADAM optimizer in which the quantizer is part of the forward pass. The gradients of the loss function are evaluated corresponding to the quantized weights while doing a book-keeping of the high-precision weights. We demonstrate applications for compressed image recovery and magnetic resonance image reconstruction. The proposed approach offers superior reconstruction accuracy and quality than state-of-the-art unfolding techniques, and the performance degradation is minimal even when the weights are subjected to extreme quantization.

Impact of the research: The novel techniques proposed in this thesis led to improved accuracy in linear inverse problems — sparse signals recovery, compressed image recovery, image deconvolution, and image denoising. The tight-frame based algorithms require fewer iterations to converge, thus reducing the reconstruction time. The quantized neural networks, on the other hand, improved the inference time and reduced the model footprint for efficient deployment on the edge. Analysis of deep-unfolded networks has shown that the learnt weights follow a Gaussian distribution suggesting more efficient initialisation schemes than weights derived from ISTA. We also identified potential local instabilities in a deep learning setting, which are avoided in a conventional optimization setting. The role of the nonlinearity is to restore stability. The analysis showed that while deep unfolded networks have potential instabilities, they can be useful for solving inverse problems.

About the Candidate:
Nareddy Kartheek Kumar Reddy is the 13th PhD student to graduate from the Spectrum Lab, Department of Electrical Engineering at the Indian Institute of Science (IISc). He received a Bachelor of Technology (Honors) degree from Indian Institute of Technology Kharagpur in 2016. Subsequently, he worked as a Senior Engineer at Honeywell Technology Solutions from 2016 to 2018, where he focused on developing device drivers for SD card and NAND Flash devices which went into production in Honeywell’s flagship weather radar RDR7000.

Kartheek joined IISc as a Masters student in Signal Processing, and subsequently upgraded to PhD after receiving the prestigious Prime Minister’s Research Fellowship in 2019. He is twice recipient of the Qualcomm Innovation Fellowship, once in 2020 & again in 2023.

Talk on the four generations of single-neuron models: From the perceptron to the complex adaptive system
2025-02-17 15:00 - 17:00 | MMCR, Hall C 241, 1st floor, EE department
Talk on The four generations of single-neuron models: From the perceptron to the complex adaptive system
by Professor Rishikesh Narayanan, Molecular Biophysics Unit, Indian Institute of Science, Bengaluru 560012
Venue: Multimedia Classroom (MMCR), EE Department, IISc
Date & Time: February 17, 2025, 3 PM (Coffee will be served at 2.45 PM)
The key objective of this talk is to foster interdisciplinary AI research by way of understanding the recent advances in Neuroscience and leveraging them for building superior AI models that are closer to natural intelligence.

Abstract:
The first generation of single-neuron models treated neurons as perceptrons or integrate-and-fire devices, involving some form of summation that was followed by a nonlinearity. This class of models originated in the early 1900s with the law of dynamic polarization laying the conceptual foundation. The 1950s introduced the second generation of models with Hodgkin and Huxley’s ground-breaking use of ordinary differential equations to describe action potential dynamics. This second era emphasized the nonlinear dynamical systems framework to capture ionic interactions underlying neuronal functions. The third era, beginning in the early 1990s, incorporated spatial complexity into single-neuron models by acknowledging dendrites as active participants in neural computation. Patch-clamp electrophysiology facilitated discoveries of active conductances in dendrites, leading to models based on coupled partial differential equations spanning entire dendritic structures. By the early 2000s, variability among neurons of the same subtype highlighted the need for models beyond a single archetype. This ushered in the fourth generation of models, where single neurons are recognized as complex adaptive systems. Complex systems are systems where several functionally specialized subsystems interact to yield collective functional outcomes, and are defined by two key attributes. First, the interactions among subsystems of a complex system are neither fully determined nor completely random. This intermediate level of randomness is characterized by network motifs — subnetworks that appear more frequently than expected in random networks. The second defining feature of complex systems is degeneracy, where multiple combinations of distinct subsystems can achieve the same collective function. The complex systems framework unifies earlier models, highlighting dynamic and adaptive interactions among specialized subsystems to explain collective neuronal function.

About Rishi: Rishi earned his Ph.D. from the Department of Electrical Engineering at the Indian Institute of Science, Bangalore (Advisor: Prof. Y. V. Venkatesh). After that, he held two postdoctoral positions, the first at the National Centre for Biological Sciences, Bangalore (Advisor: Prof. Sumantra Chattarji), and the second at the University of Texas at Austin (Advisor: Prof. Daniel Johnston). He returned to the Institute in July 2009. He is currently a Professor at the Molecular Biophysics Unit of the Institute.

Hosts: Chandra Sekhar Seelamantula (EE) & Chiranjib Bhattacharyya (CSA)

EE faculty colloquium
2025-02-21 16:00 - 17:30
Title: Power Electronics – A Technology Enabler for a Carbon-free Energy Pathway
Speaker: Dr. Vinod John, Dept. of Electrical Engineering, Indian Institute of Science
Venue: MMCR, EE
Meeting Link (for online audience)
Time: 4 pm, 21 Feb 2024

Abstract:
Power electronics technologies play a pivotal role in efficiently transferring electrical energy from sources and storage elements to loads while minimizing power losses. These technologies are critical for optimizing the utilization of renewable energy sources, enhancing the efficiency of storage systems, and reducing energy wastage—all of which are essential in the global effort to achieve minimal CO₂ emissions. In this talk, I will begin with an introduction to the fundamentals of power electronics, highlighting key research challenges and discussing solutions developed in the Power Electronics Group at the Department of Electrical Engineering, IISc. Specific focus areas include power converters, switching devices, input and output filtering components, and the control of power conversion systems. I will try to summarize the research efforts over time and indicate a few practical applications of power electronics in real-world scenarios.

Speaker’s Bio:
Dr. Vinod John is a Professor in the Department of Electrical Engineering at the Indian Institute of Science (IISc), Bengaluru. He earned his Ph.D. from the University of Wisconsin–Madison and subsequently worked at GE Research, New York, and Northern Power Systems, Vermont, before joining IISc. His research interests encompass
power electronics, switched-mode power conversion, distributed energy resources, and energy storage systems.

EE PhD Defense: Infimal Convolution Based Regularization for Image recovery
2025-02-27 14:00 - 16:00 | Multi-Media Class Room (MMCR), EE Department (Hybrid mode)
Student : Deepak G Skariah
Advisor : Prof. Muthuvel Arigovindan
Title : Infimal Convolution Based Regularization for Image recovery
Date and Time: 27.02.2025 (Thursday), 2 pm.
Venue : MMCR, Department of Electrical Engineering
Meeting link
Thesis examiners: Prof. Kedar Khare, Prof. Naren Nayak
Defense examiner: Prof. Kedar Khare
Abstract
The quality of image captured by acquisition devices has increased drastically over the years largely due to a revolution in imaging sensor capability. But, image acquisition under low illumination continues to be a bottleneck for imaging devices such as optical microscopes leading to blurred and noisy images. A potential solution to this limitation is a computational approach known as image restoration. An image restoration algorithm recovers an estimate of the original image from a noisy blurred observation while assuming a knowledge of the image degradation model. The restoration problem is even more challenging when it comes to a spatio-temporal signal as a good restoration scheme needs to be mindful of presence of motion in the measured signal. This means that in spatio-temporal signal restoration problem, the algorithm should ensure temporal regularity of restored signal in addition to spatial regularity. Regularization based image restoration attempts to pose image restoration problem as a regularized optimization problem from the measured signal. We propose to exploit the concept of infimal convolution from convex analysis to design effective and efficient restoration schemes for images and spatio-temporal images.
In our first work, we address the problem of regularization design. We propose a family of derivative based regularization which we call generalized unitary invariant regularization and it belongs to class of infimal convolution based functionals. We also design an algorithmic scheme to optimize the resultant optimization problem. We demonstrate the quality of proposed algorithm and restoration scheme through multiple experiments on simulated data.
In our second work, we address the restoration of spatio-temporal images measured from TIRF microscopes where a sequence of noisy blurred images are observed over time. We once again exploit the infimal convolution based approach to design a novel spatio-temporal regularizer that is tailor made for above class of signals. The proposed regularization was designed to ensure both spatial and temporal regularity of restored signal. The resultant regularization functional is defined as an optimization problem where the cost is a weighted sum of two constituent functions where the two functions play the role of promoting spatial and temporal regularity respectively. We also design an algorithm to optimize the resultant restoration problem using this regularization. We demonstrate the quality of the proposed algorithm by testing the restoration quality against spatio-temporal measurements collected from TIRF microscopes.
In the third and final work we address the problem of estimating the relative weights in spatio-temporal regularization functional designed based on infimal convolution formulation. We propose a renewed optimization model where the spatio-temporal signal is estimated together with the better quality image estimate by incorporating the weights as part of the optimization problem. We also design an iterative scheme to optimize the resultant joint optimization model. We demonstrate the effectiveness of this scheme against other joint optimization schemes for spatio-temporal signal estimation.

EE Talk: Cybersecurity for the Power Grid in the AI Age - 7th March 3PM, MMCR
2025-03-07 15:00 - 17:00 | Multi-Media Class Room (MMCR), EE Department (Hybrid mode)
IEEE PES Student Branch Chapter, IISc and POWERGRID Center of Excellence in Cyber Security (PGCoE) is pleased to invite you for a technical talk by Prof. Manimaran Govindarasu, Iowa State University, USA. The technical talk details are as follows.

Title: Cybersecurity for the Power Grid in the AI Age
Venue: C-241, MMCR, 1st floor, Electrical Engineering Department
Date and Time: 07th March 2025, 03:00 PM IST
Mode: Hybrid (Online and Offline). MS Team link
Talk Abstract: Power grid is a complex cyber-physical system (CPS) that forms the lifeline of our modern society. Reliable, secure, and resilient operation of nation’s energy infrastructure is of paramount importance to national security and economic wellbeing. In recent years, there has been a growing trend of cyber threats/attacks, both in numbers and sophistication, targeting critical infrastructure systems around the globe (e.g., Stuxnet, Ukraine power grid attacks, and Colonial Pipeline attack). This evolving cyber threat landscape, coupled with the leveraging of AI tools by the adversaries, underscores the importance and urgency for CPS security solutions that go beyond the traditional IT cybersecurity by leveraging grid’s cyber-physical properties and harnessing the power of AI models to be able to prevent, detect, and mitigate stealthy cyber attacks. This talk will present an overview of cybersecurity threats to critical energy infrastructures, then it will present a holistic life-cycle model for CPS security with some illustrative example solutions for attack prevention, detection, and mitigation. The talk will also briefly discuss CPS security testbeds for attack-defense evaluations and then conclude with some future research directions.

Speaker Bio: Manimaran Govindarasu is on the faculty of Iowa State University since 1999, and he currently holds the titles of Anson Marston Distinguished Professor in Engineering and Harploe Professor in Electrical and Computer Engineering. Prior to joining Iowa State, he received his Ph.D. in Computer Science and Engineering from Indian Institute of Technology, Madras (Chennai). His research experience includes Cybersecurity for the Smart Grid and Critical Infrastructures, and Real-time Systems and Networks. He has co-authored over 300 peer-reviewed research publications, received multiple conference best paper awards, presented several dozen conference invited talks, tutorials, and industry short-courses, hands-on training sessions, and mentored over 50 graduate students for their dissertation/thesis research. He is currently serving as the Chair of Cybersecurity Working Group for Power Grid in IEEE Power & Energy Society and has served as an Associate Editor and guest co-editor for several flagship IEEE publications. His research is supported over the years by US NSF, DOE, DHS, and DOD. He is a Fellow of the IEEE and an ABET Program Evaluator.

Thesis Defense (Online)
2025-03-19 16:00 - 17:30 | Online, India
Title: Parallel Algorithms for Efficient Utilization of Multiprocessor Architectures for Transient Stability
Student: Francis C Joseph
Faculty Advisor: Dr. Gurunath Gurrala.
Examiner: Prof Saikat Chakrabarti, IIT Kanpur
Date : 19th March 2025
Time: 4 PM – 5.30 PM
Mode: ONLINE
TEAMS LINK
ABSTRACT:
Computer hardware capabilities have been enormously increasing over the years. Multi-core processors, graphic processing units (GPUs), and field programmable gate array (FPGA) accelerators have grown significantly recently. They have opened new computational paradigms such as edge computing, fog computing, grid computing, distributed computing, cloud computing, and exascale supercomputing. However, efficiently utilising most of these computational paradigms in traditional engineering disciplines, such as power engineering, is challenging. In this thesis, efficient algorithms for multiprocessor-based high-performance computing and edge computing platforms for two power system applications are developed, power system stability assessment and power quality measurements respectively. Faster than real-time transient stability assessment of large power grids using time domain simulations with detailed models is computationally challenging. Today, the commercial tools used for this application in Energy Management Systems (EMS) worldwide rely on parallel batch processing methods, which don’t efficiently utilise the architecture of the computational paradigms. For transient stability simulations, this thesis explores a time parallel algorithm, Parareal in Time, which belongs to a class of temporal decomposition methods for time parallel solutions of differential equations. Two effective implementation approaches, Master Worker and Distributed, are analysed for large systems, and scaling tests are performed using a state space model with a Message Passing Interface (MPI) in a multiprocessor environment. One of the findings was that the performance of the Parareal depends on the accuracy and the computational cost of the coarse solver used for initialisation and subsequent correction steps. A potential coarse solver, Modified Euler (ME), a well-known solver for transient stability simulations even in commercial packages, has been explored to adapt its step size by controlling the Local Truncation Error (LTE) to achieve the desired accuracy. An LTE estimator using a Multistage Homotopy Analysis Method (MHAM), which gives an approximate solution to a set of non-linear equations in the form of a power series, is proposed to control the LTE at each integration step to enable adaptation of the ME step size. The proposed MHAM-assisted adaptive ME solver is faster and has comparable accuracy to the conventional fixed and adaptive Modified Euler solver for large systems’ transient stability simulations. Since MHAM is lighter than the ME solver and the LTE estimate is sufficient for step size adaptation, an adaptive MHAM coarse solver is proposed for the Parareal. However, MHAM provides a non-zero auxiliary parameter `c’ to select a family of solutions. Hence, an optimisation framework is also proposed to automatically select this parameter based on the system’s dynamics. Based on many case studies on test systems of different sizes, it is found that maintaining the LTE lower than the Parareal convergence tolerance improves the speedup of the Master-Worker paradigm; however, for the distributed implementation, maintaining LTE higher than the convergence tolerance gives improved speedup. An approach to include unscheduled events which arise in power system operation due to the operation of protective relays is also proposed for Parareal. The impact of frequency estimation on Parareal is evaluated using three estimation methods. It was found that the network admittance-based method has the lowest execution time. Many different types of disturbance types are performed on systems of different sizes and see that Parareal can maintain its performance. In Parareal implementation, each coarse time segment is assigned to one processor in the MPI environment. Multiple processors in a node can be assigned to a coarse time segment to improve speedup. Therefore, a shared memory-based space parallel transient stability solver is also considered for further performance enhancement. Space parallelisation of transient stability simulation involves breaking the network into subnetworks and solving each part independently while ensuring the original network’s convergence. Therefore, a Multi Area Thevenin Equivalent (MATE) based parallel solver implementation on a shared memory platform is proposed, and both space parallelisation and task parallelisation are explored. It is shown that the space parallelism can closely match the ideal speedup and can be exceeded by space + task parallelism while the network is well-partitioned. It can be further improved when combined with time parallelism. A hybrid time-space solver using OpenMP MATE, space + task parallelism, and MPI Parareal is proposed using two scheduling schemes: homogeneous and heterogeneous for both communication paradigms. The homogeneous scheduling enabled a faster-than-real time solution even for the PEGASE 13659 bus system and provided multiple combinations to achieve it. The heterogeneous can increase the performance of the hybrid solver when homogeneous scheduling is unavailable. A particular case for Hybrid Master with a single core worker was used to showcase the initialisation phase’s time reduction by reducing the coarse solver’s computational time. The current state-of-the-art chips also provide multicore architectures for edge computing applications. One such low-cost, open-source, heterogeneous, resource-constrained hardware platform is called Parallella. The unique hardware architecture of the Parallella provides many edge computing resources in the form of a Zynq SoC (dual-core ARM + FPGA) and a 16-core co-processor called Epiphany. This Parallella device was used as a measurement device for edge computing applications research in smart grids, and it could sample 3 voltages and four currents at a 32 kHz sampling rate. The thesis explores one application of such a device to measure the harmonics and compute various Power Quality (PQ) indices. A parallel implementation of multichannel FFT on Epiphany for the streaming data is developed in this regard. Epiphany 16-core architecture has very limited memory resources, and the order in which the cores are to be accessed significantly impacts the execution. Proper decomposition of the FFT algorithm tasks and scheduling the tasks for efficient core and memory usage are crucial, requiring a good understanding of the Epiphany architecture. The obtained PQ measurements from the proposed implementation are comparable to those of a commercial power analyser.

Colloquium
2025-03-20 11:30 - 13:00 | MMCR, Hall C 241, 1st floor, EE department
Date & Time: 20th March 2025, at 11:30 am
Speaker: Mr. Varun Krishna P S
Venue: EE, MMCR [1st Floor, C241]

Title: Self-Supervised Learning Approaches for Content Factor Extraction from Raw Speech

Abstract:
The rapid expansion of the digital data has led to a growing interest in self-supervised learning (SSL) techniques, particularly for speech processing tasks where labeled data is often scarce. SSL enables models to learn meaningful representations directly from raw data by capturing inherent structures and patterns without requiring explicit supervision. To be effective, speech representations must not only capture content-related information—such as phonetic, lexical, and semantic features—but also remain robust against speaker variations, co-articulation effects, channel distortions, and background noise. The focus of this talk is to describe our efforts in developing self-supervised learning techniques in extracting semantic content from raw speech while remaining invariant to non-semantic speech factors.

In the first part of the talk, we propose the Hidden Unit Clustering (HUC) framework, which integrates contrastive learning with deep clustering techniques to enhance representation quality. A speaker normalization strategy is incorporated to mitigate speaker variability, ensuring that the extracted representations focus primarily on the content-related information. Additionally, a heuristic data sampling method is introduced to generate pseudo-targets for deep clustering, further refining the learned representations. The framework is evaluated across multiple SSL models, demonstrating significant improvements in phonetic and semantic benchmarks, as well as superior performance in the low-resource ASR settings.

The second part of the talk focuses on the efforts to achieve context-invariant representations to address the challenges posed by co-articulation effects and variations in speaker and channel characteristics. To achieve this, a pseudo-con loss framework is proposed, leveraging pseudo-targets to guide the contrastive learning and enhance robustness. This approach serves as an effective auxiliary module that can be seamlessly integrated into SSL models based on deep clustering. Extensive evaluations demonstrate state-of-the-art performance across multiple ZeroSpeech 2021 sub-tasks, as well as significant improvements in phoneme recognition and ASR performance.

In the final part of the talk, we explore the integration of adversarial learning to obtain semantic representations that are invariant to non-semantic factors. A gradient-reversal mechanism is employed to suppress non-semantic variations explicitly within the SSL models, thereby refining the learned representations. The proposed adversarial learning approach effectively disentangles content from non-semantic factors, leading to robust semantic representations. Experimental results confirm that the proposed approach enhances the ability of speech processing models to generalize across different acoustic conditions while preserving the linguistic information.

Bio:
Varun Krishna is a PhD scholar at the Department of Electrical Engineering, Indian Institute of Science Bengaluru. He obtained his B.Tech from the Department of Electronics and Communications from NITK, Surathkal, in 2017. Later completed his M.Tech in Signal Processing from the Department of Electrical Engineering, Indian Institute of Science, Bengaluru, in 2019. His research interests include self-supervised representation learning, large language models, and generative AI.

PhD Oral Examination
2025-03-25 15:00 - 17:00 | MMCR, Hall C 241, 1st floor, EE department
The oral examination of Lalgy Gopi will be held at the Multi-Media Class Room (MMCR), EE Department, between 3 pm and 5 pm on Tuesday, March 25.

PhD Thesis Defense
2025-03-27 14:00 - 17:00 | Multi-Media Class Room (MMCR), EE Department (Hybrid mode)
Name of the Candidate: Lalit Manam
Research Supervisor: Venu Madhav Govindu
Date and Time: March 27, 2025, Thursday, 2:00 PM
Venue: C-241, First Floor, Multimedia Classroom (MMCR), EE
Title: Global Methods for Camera Motion Estimation
Abstract:
In computer vision, Structure-from-Motion (SfM) aims to recover a 3D reconstruction of a scene from a collection of images of the scene. SfM has been of interest to the 3D computer vision community for the last few decades, with a wide range of scientific, industrial and domestic applications. A key component of global approaches to SfM is estimating the motion of individual cameras, i.e. their rotation and translation with respect to a frame of reference. The camera motions are generally not available a priori, making their estimation a crucial component. This thesis focuses on accurate, reliable and efficient estimation of camera motions in SfM. We examine a number of issues concerning the estimation of camera motions, namely input quality, choice of cost function and the underlying graph representation, and develop methods to address these issues.
Input Quality: We examine the problem of translation averaging, where all camera translations are simultaneously estimated, given relative directions between them as the input. The accuracy of relative camera directions is limited due to multiple factors relating to how they are obtained. We take recourse to keypoint correspondences between image pairs from which relative motions between the cameras are estimated. We propose a modular framework to iteratively reweight keypoint correspondences based on their global consistency via translation averaging methods. Our proposed framework improves relative translation directions in comparison to the translation averaging scheme used.
Choice of Cost Function: In translation averaging, recovering camera translations from relative directions involves two types of optimization costs, either comparing directions or displacements. These cost functions are often relaxed to obtain simpler optimization approaches. We observe that neither cost performs the best under varying distributions of the underlying camera translations and the noise present in the input directions. We propose a principled approach to recursively fuse the estimates obtained from both the relaxed costs using a principled uncertainty model. Our method leads to improvement in camera translation estimates compared to the individual costs.
Graph Representation: We leverage the underlying graph representation that arises due to relationships between cameras in two applications to improve camera motion estimates. In the first application, we introduce the idea of sensitivity in translation averaging, which analyzes the change in camera translations with small perturbations to input directions. We develop two different formulations to theoretically analyze the sensitivity/conditioning of the problem based solely on the inputs. We propose efficient algorithms to remove the ill-conditioned configuration of inputs, which is abundant in real data. Removal of ill-conditioned inputs significantly improves the translation estimates, revealing the benefits of our analysis.
The second application that leverages graph representation solves the tasks of graph sparsification and disambiguation of repeated structures in a unified manner. We present a scoring mechanism to identify redundant and false edges and remove them with a threshold that is optimal under an edge selection cost. We design efficient algorithms which can be applied as a preprocessing step to any SfM pipeline. Our approach handles both tasks in a unified manner, making it practical for use. Applying our methods reduces reconstruction time due to the sparsification of graphs and avoids superimposed reconstructions because of repeated structures being disambiguated.

EECS RESEARCH STUDENTS SYMPOSIUM - 2025
2025-04-03 08:00 - 2025-04-04 17:00 | IISc
EECS RESEARCH STUDENTS SYMPOSIUM – 2025

The following is the link:
(https://eecs.iisc.ac.in/EECS2025/

Talk on Noise in imaging: focus on correlation and nonlinearity
2025-04-16 02:00 - 17:00 | MMCR, Hall C 241, 1st floor, EE department
A two-part talk on

“Noise in imaging: focus on correlation and nonlinearity”
by

Professor Alessandro Foi*, Tampere University (TAU), Finland
(* of the BM3D fame, among other things)

on April 16, 2025 (Wednesday)

from 2 PM to 5.30 PM (coffee break at 3.30 PM)

Venue: Multimedia Classroom (MMCR), EE Department

Abstract:
Understanding and characterizing noise is a foundational part of the design and analysis of an imaging system, and it is also essential for the development of the corresponding image processing modules. In this talk we consider broad classes of heteroskedastic image observations and specifically focus on the noise correlation, the noise anisotropy, and on the nonlinear effects that can arise when dealing with capture at low signal-to-noise ratio or when maximizing the coverage of a narrow dynamic range. We demonstrate possibly unexpected and perhaps counter-intuitive phenomena which, unless suitably modeled and accounted for, can significantly disrupt the noise analysis and other operations in an image processing pipeline.
The talk is divided into two parts.
In the first part, I will introduce concrete examples and the relevant mathematical models of noise found in various imaging and image processing systems used in biomedical, defense, security, as well as consumer applications, including x-ray tomography, infrared thermography, confocal fluorescence microscopy, and on-demand video streaming.

In the second part, I will discuss the spectral distortion that takes place when nonlinear transformations are applied to correlated noise. In particular, I will consider the case of clipping (e.g., saturation, over-exposure, under-exposure) and the application of variance-stabilizing transformations.

Biography of the speaker:
Alessandro Foi is a Professor of Signal Processing at Tampere University (TAU), Finland. He leads the Signal and Image Restoration group and he is the director of TAU Imaging Research Platform. He is also the CTO of Noiseless Imaging, a company specialized in noise-removal, restoration, and enhancement technology for the imaging industry.

He received the M.Sc. degree in Mathematics from the Università degli Studi di Milano, Italy, in 2001, the Ph.D. degree in Mathematics from the Politecnico di Milano in 2005, and the D.Sc.Tech. degree in Signal Processing from Tampere University of Technology, Finland, in 2007. His research interests include mathematical and statistical methods for signal processing, functional and harmonic analysis, and computational modeling of the human visual system. His work focuses on spatially adaptive algorithms for the restoration and enhancement of digital images, on noise modeling for imaging devices, and on the optimal design of statistical transformations for the stabilization, normalization, and analysis of random data. He is a Fellow of the IEEE for his contributions to image restoration and noise modeling.

He was the Editor-in-Chief of the IEEE Transactions on Image Processing from 2021 to 2023. He previously served as a Senior Area Editor for the IEEE Transactions on Computational Imaging and as an Associate Editor for the IEEE Transactions on Image Processing, the SIAM Journal on Imaging Sciences, and the IEEE Transactions on Computational Imaging.

Host faculty: Prof. Soma Biswas (EE) and Prof. Chandra Sekhar Seelamantula (EE)

Talk on Things you should know before submitting your next paper
2025-04-17 14:00 - 17:00 | MMCR, Hall C 241, 1st floor, EE department
A two-part talk on
“Things you should know before submitting your next paper”

by

Professor Alessandro Foi, Tampere University (TAU), Finland
Former Editor-in-Chief, IEEE Transactions on Image Processing

on April 17, 2025 (Thursday)

from 2 PM to 5 PM (coffee break at 3.15 PM)

Venue: Multimedia Classroom (MMCR), EE Department

Hosts: Prof. Chandra Sekhar Seelamantula (EE) and Prof. Soma Biswas (EE)

Abstract:
1) Publishing process; Ethics and Etiquette : “Things you should know before submitting your next paper”
The lecture is particularly addressed to new authors with little experience about the publication workflow and principles, and it is focused on the dos and don’ts for successfully publishing a technical paper. It offers an overview of the peer-review process and discusses the ethics and etiquette standards that authors are expected to uphold and that reviewers and editors are looking for. The lecture is based on material used at IEEE training events for authors and volunteers, supplemented by additional material by the Committee on Publication Ethics (COPE); it discusses general principles followed by various publishers and communities in science and engineering.

Topics include: choice of the publication venue, framing of the contribution with respect to prior art and literature, authorship and acknowledgment, fair reporting of own and others’ results, appropriate disclosure and referencing to own previous work, appropriate description and citing of prior work, plagiarism, duplicate submissions, inappropriate replication, and bibliometric manipulation, author’s responsibilities.

2) Responding to reviews and managing the revision process
It is extremely rare (though not impossible) that a manuscript submitted to a top-tier journal gets accepted “as is” after the review of the original submission. Most often the manuscript goes through an iterative process, where editors interact with authors and reviewers with the goal of revising the manuscript to make it suitable for publication in the journal. The lecture discusses the manuscript revision process, highlighting the editorial perspective and the typical mistakes that authors make. Participants will learn how to manage and execute a productive and efficient revision, ultimately maximizing the chances that the revised manuscript will get accepted, and in fewer iterations.

Speaker’s biography:
Alessandro Foi is a Professor of Signal Processing at Tampere University (TAU), Finland. He leads the Signal and Image Restoration group and he is the director of TAU Imaging Research Platform. He is also the CTO of Noiseless Imaging, a company specialized in noise-removal, restoration, and enhancement technology for the imaging industry.
He received the M.Sc. degree in Mathematics from the Università degli Studi di Milano, Italy, in 2001, the Ph.D. degree in Mathematics from the Politecnico di Milano in 2005, and the D.Sc.Tech. degree in Signal Processing from Tampere University of Technology, Finland, in 2007. His research interests include mathematical and statistical methods for signal processing, functional and harmonic analysis, and computational modeling of the human visual system. His work focuses on spatially adaptive algorithms for the restoration and enhancement of digital images, on noise modeling for imaging devices, and on the optimal design of statistical transformations for the stabilization, normalization, and analysis of random data. He is a Fellow of the IEEE for his contributions to image restoration and noise modeling.

He was the Editor-in-Chief of the IEEE Transactions on Image Processing from 2021 to 2023. He previously served as a Senior Area Editor for the IEEE Transactions on Computational Imaging and as an Associate Editor for the IEEE Transactions on Image Processing, the SIAM Journal on Imaging Sciences, and the IEEE Transactions on Computational Imaging.

Talk on Phase Retrieval: computational imaging in the machine learning era
2025-04-21 16:00 - 17:00 | B-303,EE
A talk on

Phase Retrieval: computational imaging in the machine learning era

by Jonathan Dong, Biomedical Imaging Group, Ecole polytechnique federale de Lausanne, Switzerland

Venue: B303, Electrical Engineering Department (second floor), IISc

Date: April 21, 2025; Time: 4 PM (Coffee will be served at 3.45 PM)

Host: Prof. Chandra Sekhar Seelamantula (EE)

Abstract:
Phase retrieval is a fundamental nonlinear inverse problem that appears across a wide range of computational imaging applications, from X-ray and electron ptychography to phase imaging in optical microscopy. Because it is often addressed through nonlinear optimization techniques, it has deep links with modern machine learning theory. In this talk, I will provide a unified overview of phase retrieval models and algorithms, highlighting the connections between different applications. I will also discuss recent theoretical insights on reconstruction guarantees derived from random matrix theory. Finally, we’ll explore practical implementations, and I’ll share how these extend to our recent work on differentiable physical models and open-source computational imaging tools.

Biography of the speaker:
Jonathan Dong is an SNF Ambizione Fellow with Prof. Michael Unser at the Biomedical Imaging Group, EPFL, Lausanne, Switzerland. He received his Ph.D. degree in Physics in 2020 from Ecole Normale Supérieure in Paris, France. His research interests include nonlinear inverse problems and computational imaging, with a focus on physics-based models, reconstruction algorithms, and statistical analysis methods.

Poster Presentation, MTech(SP)
2025-06-23 09:00 - 17:30 | EE Department
Poster Presentation, MTech(SP)
Date & time : 23rd June 2025, Full day

CCE Workshop
2025-06-25 - 2025-06-27 | EE Department
CCE Workshop
Host : Prof Dr. Sarasij Das
Date & Time : 25th to 27th June 2025, Full day

Colloquium : Ms. Tanuka Bhattacharjee
2025-07-01 16:00 - 17:30 | MMCR, Hall C 241, 1st floor, EE department
Supervisor : Prof. Prasanta Kumar Ghosh
Student : Ms. Tanuka Bhattacharjee

Summer School 2025
2025-07-10 - 2025-07-12 | B308,2nd floor, EE Dept.
Date : 10th July – 12th July 2025
Venue : EE Department, Room B – 308

Alumni Meet
2025-07-14 | B308,2nd floor, EE Dept.

Colloquium : Student: Ms. Vibhuti Sahu
2025-07-18 11:00 - 12:00
Thesis Title: Time Domain Cascading Analysis Framework with Integrated Substation Configurations and Protection Systems
Student: Ms. Vibhuti Sahu, EE, IISc
SR. No: 04-03-00-10-12-19-1-17173
Faculty Advisor: Prof. Gurunath Gurrala.
Join the meeting now
Meeting ID: 478 448 375 461 6
Passcode: [REDACTED]

Oral Defense : Mr. Varun Krishna P S
2025-07-21 09:00 - 11:00 | MMCR, Hall C 241, 1st floor, EE department
Student : Mr. Varun Krishna P S
Advisor : Prof. Uday Kumar
Find this link to join below :
https://teams.microsoft.com/l/meetup-join/19%3ameeting_NmJiZGQzMzQtY2JkOC00MTllLWE3NGEtNzQ5Y2RjOTQ5ZDFi%40thread.v2/0?context=%7b%22Tid%22%3a%226f15cd97-f6a7-41e3-b2c5-ad4193976476%22%2c%22Oid%22%3a%22378ce499-3df5-4e0b-a5f9-539164b7b28b%22%7d

PhD Thesis Colloquium: Durvesh Kalke
2025-07-21 14:30 - 17:00 | MMCR, Hall C 241, 1st floor, EE department
Thesis Title: Emulation of Grid Level Energy Storage Systems on a Laboratory Experimental Testbed
Speaker: KALKE DURVESH PRASHANT . of Ph.D. (Engg) in Electrical Engineering under Electrical Engineering
Research Supervisor: Prof. Gurunath Gurrala
Meeting Link :
https://teams.microsoft.com/l/meetup-join/19%3ameeting_ZmI3ZTZjNTYtNzgzMS00ZTMwLTg2ZjAtY2M1ZWE2ZTRlMjAw%40thread.v2/0?context=%7b%22Tid%22%3a%226f15cd97-f6a7-41e3-b2c5-ad4193976476%22%2c%22Oid%22%3a%22df1edb23-47bc-4868-9b1f-5eee3a3b1232%22%7d

Oral Defense : Mr. Anupam Verma
2025-07-22 15:00 - 17:00 | MMCR, Hall C 241, 1st floor, EE department
Student : Mr. Anupam Verma
Advisor : Prof. Narayan G

Colloquium
2025-08-21 15:00 - 16:00 | MMCR, Hall C 241, 1st floor, EE department
Title: Medium Voltage AC to Low Voltage DC Converters: Topology, Modulation & Design

Speaker: Harisyam P V

Ph.D. Thesis Open Defense
2025-08-22 10:00 - 12:00 | MMCR, Hall C 241, 1st floor, EE department
Student Name : Mrs. Baby Sindhu A . V.

Thesis Title : Developmental Studies on Polymeric Nano/Micro Composite Insulation for Various High Voltage Power Applications

Professor : Prof. Joy Thomas. M.

https://teams.microsoft.com/l/meetup-join/19%3ameeting_YjZiNGVkYzYtODA1ZC00NmMxLWEzYTctYWRjNjM4OGMwZTNk%40thread.v2/0?context=%7b%22Tid%22%3a%226f15cd97-f6a7-41e3-b2c5-ad4193976476%22%2c%22Oid%22%3a%22aff5f912-6b5f-4511-96bb-925683e426e0%22%7d

PhD Oral Examination of Mr. Kamisetti N V Prasad
2025-09-17 15:30 - 17:30 | MMCR, Hall C 241, 1st floor, EE department
Thesis Title: “Modeling, Design and Control of Power-Electronic-Actuated Electromagnetic Bearings”
Name of the Student: Kamisetti N V Prasad
Research Supervisor: Prof. G. Narayanan
Team’s link:
https://teams.microsoft.com/l/meetup-join/19%3ameeting_MTdhNmUyYjYtMjEwOS00NWRlLTliZTgtODc2OGI5NTZkODRh%40thread.v2/0?context=%7b%22Tid%22%3a%226f15cd97-f6a7-41e3-b2c5-ad4193976476%22%2c%22Oid%22%3a%22f711300f-120c-447e-8a76-45f7c1a483a8%22%7d

PhD Thesis Defence : MANISH MANDAL
2025-09-19 15:00 - 17:00 | MMCR, Hall C 241, 1st floor, EE department
Thesis Title: Modelling the Switching Dynamics of Advanced Power Semiconductor Devices: From Silicon Superjunction to Wide Bandgap Technologies
Name of the Student: Manish Mandal
Research Supervisor: Prof. Kaushik Basu
Teams Meeting Link:
https://teams.microsoft.com/l/meetup-join/19%3ameeting_OWY4MTljNTQtNzg0NS00YWQ0LTljZWMtOTBkYmQ5ZDJiNDM5%40thread.v2/0?context=%7b%22Tid%22%3a%226f15cd97-f6a7-41e3-b2c5-ad4193976476%22%2c%22Oid%22%3a%22eb94fa47-7fce-40ed-bc9a-2e29c75a99ec%22%7d

EE PhD Colloquium - Vishal Anand A G
2025-10-10 10:00 - 11:00 | MMCR, Hall C 241, 1st floor, EE department
Title: Topology, Design and Dynamic Modeling of Resonant-based DC-AC and DC-DC Converters
Speaker: Vishal Anand A G

Mid term Interviews
2025-11-17 - 2025-11-19 | B – 218 and Chairman’s room, EE department
MID TERM INTERVIEWS
17th, 18th and 19th November
Venue : 1. Chairman’s room, Ground floor A wing
2. B-218, 1st floor B wing
