EE

Thesis Defense of Shubham Rawat
2023-03-09 14:30 - 2023-03-10 04:30 (Asia/Kolkata) | Online, India
Title: A Novel Passive Regenerative Snubber for the Phase-Shifted Full-Bridge Converter: Analysis, Design and Experimental Verification.
Research Supervisor: Prof. Kaushik Basu
Meeting Link

Abstract:
The development of Wide Bandgap (WBG) devices has enabled power electronic converters to operate at much higher frequencies, voltages and power. Working at a higher switching frequency minimises the size of magnetics but results in significant switching losses and electromagnetic interference (EMI) noise. Thus, it necessitates the use of soft-switching techniques to reduce these losses. Phase-Shifted Full-Bridge (PSFB) Converter is the most widely used soft-switching topology in the high-voltage and high-power, unidirectional DC-DC conversion. The phase shift PWM control utilises the converter parasitic to achieve zero voltage switching (ZVS) turn ON. The gating technique allows the magnetic energy stored in the leakage inductance of the isolation transformer to charge and discharge the output capacitances of the inverter leg.

However, the converter suffers from severe voltage overshoots across the rectifier bridge during the zero to the active state transition. The resonant circuit formed between the transformer leakage inductance and the parasitic diode capacitance of the rectifier is responsible for the high-voltage ringing. Many passive and active snubbers are presented in the literature to mitigate the high voltage overshoots across the diode bridge. While passive snubbers are relatively simple to implement than active snubbers, they are lossy. On the other hand, the active snubbers require additional gate driver circuitry and complex control.
The first part of the thesis proposes a novel passive regenerative snubber to overcome the mentioned drawbacks of the existing snubbers. The proposed snubber is ideally lossless with no control complexity. The work covers a detailed analysis of the PSFB operation with the proposed snubber while obtaining closed-form expressions for the converter state variables at the end of each topological stage. The study considers all the major converter parasitic, such as transformer leakage and magnetising inductances, and parasitic capacitances of the converter. Given the new snubber, the thesis also lays out a step-by-step PSFB design procedure utilising the analysis carried out in the first part of the work. The design aimed to develop a 100 kHz PSFB for an input voltage of 360-400 V and the output power range of 0.5-1.5 kW at a fixed output voltage of 48 V. The design approach focuses on the two design objectives. All inverter switches must achieve ZVS turn ON, and the converter gain must achieve the necessary gain to maintain desired constant output voltage for all possible operating conditions.
A hardware prototype is built and tested as per the given specification. The experimental results validate the effectiveness of the snubber in reducing the voltage overshoot. Further, the analysis and design accuracy is verified using the measured state variables. Finally, the work presents the overall efficiency and the loss distribution among the converter components.

MTech (Research) Colloquium of Vishwabandhu Uttam
2023-03-10 16:30 - 2023-03-13 18:30 | EE, MMCR
Title: A Unified Modeling Approach for Design and Performance Improvement of Triple Active Bridge Converter

Research Supervisor: Vishnu Mahadeva Iyer

Meeting link

Abstract:Triple Active Bridge (TAB) converter is a multi-port DC-DC converter. This converter is an extension of the popular Dual Active Bridge converter. It features desirable traits of the DAB converter, such as high power density, galvanic isolation, and bi-directional power flow between any of the ports. As in other multi-port converters, redundant power conversion is minimized through component sharing among the ports in a TAB converter. All the switches in a TAB converter can undergo soft-switching over a wide range of operating points, reducing switching losses and the size of auxiliary components. The multiple degrees of freedom in modulating a TAB converter offer several design and operational flexibilities.However, this converter has yet to come into the limelight despite these advantages. One of the reasons is the lack of a unified analytical framework for the design and operation of this converter. The existing models for the TAB converter are limited in scope and cannot be easily used for the design and operational optimization of the converter. This work focuses on developing simple, unified models for analyzing the TAB converter.Firstly, the popular Fundamental Harmonic Approximated (FHA) large-signal and small-signal models are evaluated to understand their limitations. Improved large-signal and small-signal Generalised Harmonic Models (GHM) are developed by incorporating the impact of higher-order harmonics. While the GHM is shown to be superior for small-signal analysis of the converter, it is not suitable to analyze the soft-switching bounds of the TAB converter. To overcome the limitations of GHM, a Unified Model that incorporates the impact of the magnetising inductance of the three-winding transformer is proposed. The Unified Model can accurately predict the AC port currents at the switching instants and is used to study the soft-switching bounds of the TAB converter. The GHM and Unified Model are validated through extensive switching circuit simulations and experimental results from a 1 kW hardware prototype developed in the laboratory.Further, a new design algorithm for the TAB converter is proposed. The proposed algorithm leverages the FHA model’s simplicity and the Unified Model’s accuracy. Finally, a new modulation scheme based on Penta Phase Shift with five degrees of freedom is proposed to achieve soft-switching across the operational range of the TAB converter.
We request your presence at the colloquium.
All are welcome.

Thesis Defense of Mr. Manish Tathode
2023-03-27 21:00 - 23:00 | EE-B304, EE Department.
Title: Fast and Compact Voltage Equalizer for Satellite Applications.
Advisor: Prof. Vinod John.Date and Time: Monday, 27th March 2023, 3.30 pm.Location: EE-B304, EE Department.Meeting Link:
Abstract:Lithium-ion batteries have now become an inevitable constituent of the Electrical Power System of solar-powered satellites due to their high energy density, wider operating temperature range, and better radiation tolerance. For the compact realization and better space utilization, the series-parallel connected Li-ion batteries are operated with currents close to the design limit of the cells, speeding up the increase in the inherent initial imbalance in the individual cell voltages in a series-connected stack, demanding fast equalization to avoid underutilization and reduced lifetime. Active multicell-to-multicell equalization achieves fast equalization by efficient simultaneous charge transfer among multiple cells in the series connected stack. PS-MAHB equalizer is one such multicell-to-multicell equalizer with the ability to maintain higher equalization currents irrespective of decreasing differences in the cell voltages. Its open loop, soft-switched operation, and modularization abilities make it an attractive choice for space applications. However, it needs to be modified with the necessary protective features and required redundancy essential for its use in space applications. Hence, the Modified PS-MAHB (M-PS-MAHB) equalizer is developed by incorporating necessary protection features and redundancy in the PS-MAHB equalizer. The flow of development of M-PS-MAHB equalizer is discussed. The Failure Mode Impact Analysis of the M-PS-MAHB equalizer reveals that during the most likely switch short circuit failure mode, the faulty part of the equalizer is disconnected by the protective device and the redundancy does not let the cell get out of the equalization. Simulation results of FMIA considering transient and steady state impact of the failure are discussed.The existing static phase shift-based control of the equalizer causes direct dependency of the equalization currents on the cell voltages and limits the equalization current levels to lower than the design equalization current value when the cell voltages are lower. Thus, the control works with a reduced rate of equalization and causes the under-utilization of the equalizer hardware for a significant duration of time in the charge-discharge cycle. A dynamic phase shift-based control is proposed to maximize the equalization current through the cells irrespective of the cell voltages which further increases the rate of equalization and improves the equalizer hardware utilization. In the simulation, a significant improvement in the equalization rate compared to the static phase shift control is verified with the proposed dynamic phase shift-based control.The compact hardware realization of the equalizer hardware and the voltage sensor board addresses the space-volume constraints put by satellite applications. The equalizer hardware is realized as 4-cell equalizer modules, and the compactness of the equalizer hardware is achieved by pushing the switching frequency to 1MHz reducing the values of the passive components. A non-isolated high-precision op-amp-based voltage sensing scheme is developed to target the equalization band close to 10mV. The concept of an easy-to-design motherboard-based interface is introduced, which does not require any changes in the design of the 4-cell equalizer module and the voltage sensor board, irrespective of the cell connector geometry.The experimental results verify the operation of the equalizer demonstrating the convergence of cell voltages from the initial imbalance of 300mV to the band of 10mV. The impact of the non-ideal dynamic response of the Li-ion cell voltage to a step change in current and its impact on the voltage-sensing-based control algorithm is discussed along with the necessary modifications brought in the control to reduce the impact.We request your presence at the thesis defence.

Thesis colloquium of Mr. Anoop C. S.
2023-04-10 21:00 - 23:00
Advisor : Prof. A. G. Ramakrishnan

Date and Time: 10 April 2023 (Monday) 3:30 PM

meeting link:

Join conversation
teams.microsoft.com

TITLE: Automatic speech recognition for low-resource Indian languages

Building good models for automatic speech recognition (ASR) requires large amounts of annotated speech data. Most Indian languages are low-resourced and lack enough training data to build robust and efficient ASR systems. However, many have an overlapping phoneme set and a strong correspondence between their character sets and pronunciations. In this thesis, we exploit such similarities among the Indian languages to improve speech recognition in low-resource settings.

Significant contributions of the thesis:

Exploiting the pronunciation similarities across multiple Indian languages through shared label sets:

We propose the use of a common set of tokens across multiple Indian languages and analyze their performance in mono and multilingual settings.

We find that the Sanskrit Library Phonetic Encoding (SLP1) tokens, which exploit the pronunciation-based structuring of character Unicodes in Indian languages, perform better than some other grapheme-to-phoneme (G2P) based tokens in monolingual ASR settings.
Syllable-based sub-words perform better than the character-based token units in monolingual speech recognition. However, character-based SLP1 tokens perform better in cross-lingual transfer.

Strategies for improving the performance of ASR systems in low-resource scenarios (target languages) exploiting the annotated data from high-resource languages (source languages):

We study three different low-resource settings:

A) Labelled audio data is not available in the target language. Only a limited amount of unlabeled data is available. We adopt the unsupervised domain adaptation (UDA) schemes popular in image classification problems to tackle this case.

The adversarial training with gradient reversal layers (GRL) and domain separation networks (DSN) provides word error rate (WER) improvements of 6.71% and 7.32% in Sanskrit compared to a baseline hybrid DNN-HMM system trained on Hindi.
The UDA models outperform multi-task training with language recognition as the auxiliary task.
Selection of the source language is critical in UDA systems.

B) Target language has only a small amount of labeled data and has some amount of text data to build language models. We try to benefit from the available data in high-resource languages through shared label sets to build unified acoustic (AM) and language models (LM).

Unified language-agnostic AM + LM performs better than monolingual AM + LM in cases where (a) only limited speech data is available for training the acoustic models and (b) the speech data is from domains different from that used in training.
In general, multilingual AM + monolingual LM performs the best.

C) There are N target languages with limited training data and several source languages with large training sets. Here, we establish the usefulness of model-agnostic meta-learning (MAML) pre-training in Indian languages and propose improvements with text-similarity-based loss-weightings.

MAML beats joint multilingual pretraining by an average of 5.4% in CER and 20.3% in WER.
With just 25% of the data, MAML performance matches joint multilingual models trained on the whole target data.
Similarity with the source languages impacts the target language’s ASR performance.
We use text-similarity measured through cosine and Mahalanobis distances to weigh the losses during MAML pretraining. It yields a mean absolute improvement of 1% in WER.

ALL ARE WELCOME ONLINE!

Ph.D. Thesis colloquium of Ms. Ritika Jain
2023-04-17 21:00 - 23:00 | MMCR, Hall C 241, 1st floor, EE department
Advisor: Prof. A. G. Ramakrishnan

TITLE: Multimodal sleep staging and diagnosis of sleep disorders
MS Teams link

Sleep staging is a tedious and time-consuming process carried out manually by clinicians in which they annotate overnight polysomnograph recordings. An automated sleep scoring system can perform faster and objective sleep staging. Methods are proposed to classify the sleep EEG data into multiple stages by utilizing temporal, spectral, time-frequency, non-linear, and statistical features and random undersampling with boosting technique (RUSBoost) on a decision tree classifier. The role of data augmentation and temporal context on classifier performance is evaluated for healthy controls and clinical populations. This work also attempts to classify different sleep disorders using single-channel EEG and evaluate the role of individual sleep stages in that task.

Significant contributions of the thesis:

Binary classification of sleep and wake states for healthy individuals and clinical population:

For this two-class classification problem, we explored the performances of different modalities such as EEG, EOG & EMG.

We also performed ensemble empirical mode decomposition and Poincare plot analysis of the signal for identifying sleep and wake states.

Multi-class classification of sleep stages using single channel EEG:

Utilising the knowledge from earlier works on binary classification, we considered different sets of features and evaluated the performance of RUSBoost classifier on unseen test subjects. This work reports the performance of different n-class (n=2,3,4,5,6) classification problems on three publicly available datasets of overnight polysomnography recordings.

Multi-modal classification of sleep stages using a hierarchical model

In this work, a six-level hierarchical model (HM) has been designed. The aim is to improve the sleep staging accuracy by breaking down the 5-class classification problem into six binary classification problems, while also reducing the misclassifications among N1, REM, and wake stages.

Introducing data augmentation (DA) and temporal context (TC) in the proposed hierarchical model to further improve sleep staging performance. We validated the results of DA and TC on healthy as well as clinical populations from seven publicly available datasets.

Diagnosis of different sleep disorders using a single EEG channel

This work aims to classify seven different sleep disorders and healthy controls using light gradient boosting model with a single-channel EEG.

We examined the importance of different features in distinguishing various pathological groups and healthy individuals.

We also evaluated the role of individual sleep stages in distinguishing the different disorders.

ALL ARE WELCOME
Publications based on this Thesis

Journals
1. Ritika Jain and Angarai Ganesan Ramakrishnan. Electrophysiological and neuroimaging studies–during resting state and sensory stimulation in disorders of consciousness: a review. Frontiers Neurosc., 14:987, 2020
2. Ritika Jain and Ramakrishnan A G. Reliable sleep staging of unseen subjects with fusion of multiple EEG features and RUSBoost. Biomed. Sig. Proc. Control, 70:103061, 2021

Conferences
1. Ritika Jain and Ramakrishnan Angarai Ganesan. Assessment of submentalis muscle activity for sleep-wake classification of healthy individuals and patients with sleep disorders.
In 44th IEEE EMBC 2022. IEEE, 2022
2. Ritika Jain and Ramakrishnan Angarai Ganesan. Single EOG channel performs well in distinguishing sleep from wake state for both healthy individuals and patients. In 44th
IEEE EMBC. IEEE, 2022
3. Ritika Jain and Ramakrishnan Angarai Ganesan. Poincar ́e plot analysis for sleep-wake classification of unseen patients using a single EEG channel. In 17th IEEE Int. Symp.
Med. Meas. Applns. IEEE, 2022
4. Ritika Jain and Ramakrishnan Angarai Ganesan. Classifying sleep-wake states of patients by training on single EEG or EOG channel data from normal subjects. In 2022 IEEE Region 10 Symposium (TENSYMP), pages 1–5. IEEE, 2022
5. Ritika Jain and Ramakrishnan Angarai Ganesan. An efficient sleep scoring method using visibility graph and temporal features of single-channel EEG. In 43rd Ann. Int. Conf IEEE EMBC, pages 6306–6309. IEEE, 20216. Ramakrishnan A G and Ritika Jain. Binary state prediction of sleep or wakefulness using EEG and EOG features. In 17th India Council Int. Conf (INDICON), pages 1–7. IEEE, 20207. Ritika Jain and Angarai Ganesan Ramakrishnan. Sleep-awake classification using EEG band-power-ratios and complexity measures. In 2020 IEEE 17th India Council International Conference (INDICON), pages 1–6. IEEE, 2020Manuscripts under Review

• Ritika Jain and Ramakrishnan A G. Modality-specific feature selection, data augmentation, and temporal context for superior performance in sleep staging. IEEE Jl. Of Biomedical & Health Informatics, 2023.

ALL ARE WELCOME – People outside IISc can join through the MS Teams link given.

EE Seminar: High voltage aviation electrical system EMC challenges and opportunities
2023-04-24 16:00 - 18:00 | MMCR, Hall C 241, 1st floor, EE department
Dear all,

I cordially invite you to attend this talk by Dr. Cong Li from GE Aerospace Research, Niskayuna, NY, USA. The details are given below.

Date & Time: 24/04/2023, 10.30 am – 11.30 am

Venue: MMCR, Dept. of Electrical Engineering (Hybrid Mode)

For online participants:Meeting Link

Title: High voltage aviation electrical system EMC challenges and opportunities

Abstract: High voltage aviation electrical systems have unique design challenges to meet ultrahigh power density and reliability requirements under extreme operation conditions. One critical aspect is the Electromagnetic Compatibility (EMC), such as emission and susceptibility, etc. This talk will explain the fundamental EMC challenges for wide band gap (WBG) based high voltage aviation electrical system, and share an effective “SOLVE” EMC design process for meeting stringent aviation EMC requirements.

Speaker Bio: Dr. Cong Li (S’09-M’15-SM’19) received the Ph.D. degree in electrical engineering specializing in power electronics from The Ohio State University, Columbus, OH, USA, in 2014. He joined GE Aerospace Research at Niskayuna, NY, USA as a Research Engineer in 2014 and is currently a Senior Power Electronics Engineer and EMC Lead. His research interests include aviation high voltage, high power, high density wide band gap (WBG) power electronics systems, and EMI mitigation techniques. He is currently leading multiple flight demo EMC projects at GE Research. He has authored more than dozens of technical papers, and patent applications in the area of power electronics and EMC. He is a voting member of commercial aviation DO-160 EMI standard working group.

He has been given EMI webinars and tutorials at multiple IEEE conferences such as ECCE, APEC, EMC Symposium, etc. He is currently a Senior Member of IEEE, and Associate Editor at IEEE Open Journal of Power Electronics. He is serving as secretary of IEEE-EMCS-SC5 Power Electronics EMC, as well as Technical Committee member of IEEE APEC, ECCE, ITEC, EATS conferences.

Regards,
Vishnu

EE seminar: Advances in Power Electronics and Power Semiconductors for E-mobility Applications
2023-04-24 20:30 - 22:30 | B 303 (Old 311), Dept. of Electrical Engineering (Hybrid Mode)
Dear all,

I cordially invite you to attend this talk by Dr. Ajay Poonjal Pai from Infineon Technologies AG, Neubiberg, Germany. The details are given below.

Date & Time: 24/04/2023, 3 pm – 4 pm

Venue: B 303 (Old 311), Dept. of Electrical Engineering (Hybrid Mode)

For online participants: Meeting Link

Title of the Talk: Advances in Power Electronics and Power Semiconductors for E-mobility Applications

Abstract: E-mobility has emerged as an interesting application for power electronics and power semiconductors. Not only is this market demonstrating an exponential growth, but is also filled with interesting challenges. This is where Power semiconductors and power electronics can pitch in to facilitate adoption of electric cars. This talk gives an overview of the most interesting power electronic applications in electric Vehicles, with a main focus on the traction inverter application, which is, by far, the most important from a power semiconductor point of view. The latest trends in the application and power semiconductor technologies is discussed. Special focus will be given to Silicon Carbide Mosfet technology which offers significant benefits in terms of power density, switching behaviour, conduction behaviour etc. Results of power loss measurements are shown and discussed.

Speaker Bio: Dr. Ajay Poonjal Pai obtained his B.Tech in Electrical Engineering from NITK Surathkal, India and M.Sc. in Electrical Power Engineering from RWTH Aachen University, Germany. He then pursued his PhD focusing on Silicon Carbide at the Friedrich Alexander University, Erlangen-Nuremberg, Germany. Since 2015, he is working at Infineon Technologies AG, Neubiberg, Germany as a Principal Application Engineer responsible for next-generation Silicon Carbide technologies and Power Modules for electric vehicles. His research interests include e-mobility, Silicon Carbide semiconductors and power electronics. He enjoys following new technologies and understanding trends in the power electronics and automotive markets. He has contributed to several conferences and journals, and has delivered numerous lectures and tutorials around the world.

Regards,
Vishnu

IISc-TU Delft Talk by Prof Marjan Popov 26th April 11 am
2023-04-26 16:30 - 18:30 | MMCR, Hall C 241, 1st floor, EE department
Dear All,
Prof Marjan Popov of TU Delft will be visiting IISc on 26th April 2023. He will be giving a talk in the MMCR of the Electrical Engineering Department, from 11 am on “Power System Protection Essentials – research activities”. He will mostly give an overview of the research activity carried out by his lab. This talk is a part of an IISc-TU Delft joint project.
All are invited.

PhD Oral Examination of Kapil Upamanyu @ 10 am on Thursday, May 11, 2023
2023-05-11 15:30 - 17:00 | Multi-Media Class Room (MMCR), EE Department (Hybrid mode)
PhD Oral Examination

Name of the candidate: Kapil Upamanyu
Programme: PhD (Regular)
Department: Electrical Engineering

Title:
Modelling, Stabilization Methods and Power Amplification for Power Hardware-in-Loop Simulation with Improved Accuracy

Supervisor: G Narayanan

Date: May 11, 2023 (Thursday)
Time: 10 am – 11:30 am
Venue: Multi-Media Class Room (MMCR), EE Department (Hybrid mode)
Video link: Please find below:

All are welcome

Meeting link

Join conversation
teams.microsoft.com

Thesis title: Modelling, Stabilization Methods and Power Amplification for Power Hardware-in-Loop Simulation with Improved Accuracy
Abstract:

Simulations of physical systems are extensively conducted for research and design purpose. Potential of a simulation can be extended significantly by conducting it in real-time. Real-time simulation allows a part of the mathematical model of the system to be replaced by a physical hardware; the real-time simulator (RTS) and the physical hardware interact with each other through sensors and power amplifier (PA). When the operating power level of the PA is considerably higher than that of the sensor signals, the simulation is called as power hardware in loop (PHIL) simulation. PHIL simulation is a good alternative to the conventional simulation where a part of the system cannot be adequately represented by a mathematical model. Unlike conventional simulation, PHIL simulation allows the testing of a hardware, in a safe and controlled environment, without the rest of the system being available. But several factors, such as the computation time delay and sampling effects of RTS, the dynamics of PA and the transport lag of signals, are part of a PHIL simulation but not that of the actual system. As a result, the response of the PHIL simulation of a system can differ from that of the actual system. The inaccuracy can be so significant that the PHIL simulation of a system can be unstable even though the actual system is stable, and vice versa. An unstable PHIL simulation can be stabilized by employing compensation algorithms. This work proposes novel PA for accurate response, stability analysis methodology for the accurate estimation of instability, and compensation algorithms for stable response of PHIL simulation.
Conventional switched-mode PAs have limited dynamic response due the presence of passive filter. These PAs employed in a PHIL simulation are unable to accurately replicate the fast transients of the system. An output filter-less voltage source inverter is proposed as a power amplifier suitable to be interfaced with inductive loads (e.g., most of the power system loads). Such a PA has a reference tracking bandwidth comparable to the switching frequency. Unlike the output of the conventional PAs, the output of the proposed PA is completely unaffected by the sudden changes in the current drawn by the loads. The proposed PA is utilized to emulate the transients of synchronous generator, along with the fast transient corresponding to the field excitation controller, while feeding a passive linear load. With a proposed improvement in the emulation method, accurate responses for unbalanced and non-linear loads are also obtained for the emulated generator. With further proposed techniques, the applicability of the proposed PA is extended for it to be interfaced to PWM converters. The PA is utilized for emulating unbalanced and harmonic (up to 23rd order) grid voltages while testing the control of a PWM rectifier. Accurate current responses are also obtained when the step changes in the grid voltage and the rectifier dc bus reference are considered.
Conventionally, stability analysis of PHIL simulation is evaluated in continuous-time domain. Since, a PHIL simulation consists of discrete-time sampling, a discrete-time domain modelling approach is proposed for more accurate stability analysis. The proposed approach is also used to accurately estimate the stability of a PHIL simulation utilizing compensation algorithms, such as feedback current filtering method. Novel compensation algorithms, based on lag compensator and cross coupled compensator, are proposed for stabilizing those PHIL simulations which cannot be stabilized using existing algorithms. PHIL simulation of a single generator infinite bus power system, which is originally unstable without and with existing compensation algorithms, is successfully conducted using the novel cross-coupled compensator.
PA sourced from a PWM rectifier can be used as 4-quadrant PA. A simple input voltage sensor-less vector control of PWM rectifier is proposed. While the performance of the proposed method, in terms of THD and power factor, is comparable to the sensor-based method and existing sensor-less methods, its computation time requirement is much lower than those for these methods. A discrete-time domain modelling of the PI-controlled current loop of PWM converters is presented. The model is used to derive closed-form time-domain expressions of the current for step changes in the current reference and the disturbance voltage, for a given set of controller and hardware parameters. Based on the derived expressions, a pre-filter is proposed to achieve the dead-beat response with the PI-controlled current loop, while having a disturbance rejection settling time of just ten switching cycles.
ALL ARE WELCOME

[Online] Faculty Candidate Talk Friday 12th May 9:30 am
2023-05-12 15:00 - 18:00
Dr. Avinash Kumar has applied for a faculty position at the EE Dept IISc. His online talk is scheduled on 12th May 9:30 am. Please find his talk details below.

Topic: Islanding Detection Methods for Inverter Interfaced Distributed Generator (IIDG)

Continuous disturbance injection-based islanding detection of an inverter-interfaced distributed generator (IIDG) has been a general trend in reported literature work. The major issues that persist in previous islanding detection methods are large Non-Detection Zone (NDZ), poor Power Quality (PQ), high implementation cost, and lack of real-time validation. Furthermore, the selection of a generic threshold is not considered for general applications and depends on the system’s rating. Various types of islanding detection methods are reported in the literature as passive, active, and hybrid methods.
In this talk, a local voltage and current measurement-based hybrid islanding detection method for IIDGs will be presented in detail. The parameters are estimated from the fundamental phasors of voltage and current at the Point of Common Coupling (PCC) of IIDG using Space Vector Rotation (SVR). The proposed disturbance in IIDG is injected only after disturbance detection by SVR parameters to mitigate the impact on PQ. Disturbance identification is easy due to the combined PCC voltage and current effects on parameter estimation. The disturbance injection is controlled and self-decaying. Further, the talk will discuss the validation of the proposed approach on Real-Time Digital Simulator (RTDS) and Controller Hardware In the Loop (CHIL) setup. The talk will also highlight the advantage of the proposed method in terms of real-time efficacy (low islanding detection time) with no NDZ and negligible impact on PQ for the detection of different islanding events.
At the end of the talk, a brief overview of recently reported work on “Dynamic-State-Estimation-Based Cyber Attack Detection for Inverter-Based Resources” will be delivered.

The link of the talk is:

Team Link

Ph. D. Thesis Colloquium of Mr. Pradeep K. G.: 11 am Monday, 15 May: EEG correlates of non-ordinary states of consciousness and slow-paced breathing
2023-05-15 16:30 | MMCR, Hall C 241, 1st floor, EE department
Title: EEG correlates of non-ordinary states of consciousness and slow-paced breathing

Name of the student: Pradeep Kumar G

Advisor: Prof. A. G. Ramakrishnan

Date and Time: 15 May 2023 (Monday) 11:00 AM

Venue: Hybrid: MMCR, Hall C 241, 1st floor, Department of EE
Meeting Link

==================================================================================

TITLE: EEG correlates of non-ordinary states of consciousness and slow-paced breathing

Studies on the non-ordinary states of consciousness (NSCs) induced by meditation, hypnosis, and trance are gaining visibility due to their potential efficacy in treating various clinical conditions. Slow-paced breathing at six cycles per minute (cpm) has been labelled as coherent breathing since it has been suggested to induce synchronous resonance frequency in various physiological signals. These self-regulatory or guided processes are practiced primarily to reduce stress and manage emotions and mental health. However, the underlying mechanisms for the health benefits of these practices still need to be fully understood. Electroencephalography (EEG), a non-invasive electrophysiological tool to investigate brain’s electrical activity, is used to study the changes in brain dynamics during different NSCs.

Significant contributions of the thesis:

Changes in EEG coupling during eyes-open meditation.

The interdependencies between brain signals clustered in different groups across the hemispheres were studied using bivariate functional connectivity (FC) methods.

Changes in the FC between EEG electrode pairs were investigated during the meditation practiced by long-term Brahmakumaris Rajyoga meditators with open eyes and during listening to music by controls as the comparable task.

Common and distinct patterns were observed in distinct frequency bands in meditators and control groups. Node-degree strength was consistently higher in meditators than controls in theta band.

Synergy and redundancy of the brain during different non-ordinary states of consciousness.

This is a multicentric study on three different NSCs: Rajyoga meditation (RM), hypnosis, and self-induced cognitive trance (SICT).

Synergistic and redundant information measures were used to compare and contrast the higher-order interactions during three NSCs.

The synergy of the brain increased during RM and decreased during hypnosis and SICT, and redundancy decreased during RM.

The pattern of changes observed in the synergy and redundancy values of each NSC is defined by the phenomenology of the NSC, including changes in the sense of self, environmental awareness, altered sensory perception, and selective attention.

Respiration-entrained brain oscillations during slow-paced breathing.

Coherence between the cortical activity (EEG) and respiration were analyzed during baseline and slow-paced breathing at six cpm guided by visual metronome.

Significant coherence between respiration and EEG was observed, with no common localization across subjects. However, the coherence further increased during the slow-paced breathing at six cpm.

Phase-amplitude coupling showed distinct patterns during baseline and slow-paced breathing in specific EEG frequency bands.

The modulation index increased during slow-paced breathing compared to baseline, supporting the link between respiration and brain activity and providing possible insight into the benefits of therapeutic breathing exercises like pranayama.

—————— ALL ARE WELCOME —————

Research Admission 2023
2023-05-22 13:30 - 2023-05-27 22:30 | EE, IISc
Info_EE_ResInterview_2023
Choice of research areas of 2023

Eateries:- Click here(Nesara), Click here (Sarvam)

Summer School 2023
2023-06-20 08:00 - 2023-07-07 17:00
Summer School 2023 Website Link
summer school | EE (iisc.ac.in)

Ph. D. Colloquium - Ms. Anwesha Mukhopadhyay: 10.30 am Wed, 21 June 2023: Reduced Electrolytic Capacitor-Based Single-Phase Converters: Topologies, Control, and Stability
2023-06-21 16:00 - 18:30 | MMCR, Hall C 241, 1st floor, EE department
Ph. D. Thesis ColloquiumStudent: Anwesha MukhopadhyayAdvisor: Prof. Vinod JohnDegree: PhDDate and Time: 10:30 AM, 21st June 2023Place: MMCR EE, IISc.=======================================================Title: Reduced Electrolytic Capacitor-Based Single-Phase Converters: Topologies, Control, and StabilityAbstract: Single-phase power converters find wide applications as inverters for grid integration of solar photovoltaics, fuel cells, front-end converters for consumer electronics, battery chargers for electric vehicles, etc. Applications ranging from a few hundred Watts for household solar micro-inverters, to multi-Megawatt levels for electric traction powertrain, single-phase converters are adopted worldwide.In single-phase power conversion, there is always a mismatch between the instantaneous input and output power, producing a second-harmonic ripple in the dc link current. Electrolytic capacitors are conventionally deployed for filtering the second-harmonic ripple due to their low cost and excellent energy density. However, their frequent premature failures often compromise the lifespan of the converters. Therefore, in applications demanding higher reliability, electrolytic capacitors are minimised or eliminated completely. In recent technologies demanding high power density, active filters have minimised the electrolytic capacitors in the circuit. However, the cost, efficiency, and power density trade-offs need scrutiny before adopting an active filter topology.Among the reported active filters (AF) for second-harmonic ripple mitigation, series capacitor stacked buffer (SSB) topology has emerged as a popular choice owing to its high efficiency and compactness. The use of low VA-rated switching devices enables achieving the high efficiency equivalent to passive filters. Owing to these benefits, the use of SSB is proposed in two-terminal active capacitors and active inductors and pulsed power applications.Despite its prospective utility in a range of applications, the model of the SSB, essential for implementing functional engineering control strategies under a wide range of operating conditions, is not discussed in existing literature. In the first part of the work, the plant model for controlling the buffer converter in voltage control mode as well as current control mode is developed. Using the proposed model, a closed-loop control scheme is developed, which ensures a fixed-frequency switching of the buffer converter. A step-by-step controller design procedure is elaborated, and the controller gain limit is identified to ensure closed-loop stability. The stability limit and the filtering performance are verified experimentally on a hardware prototype.Based on the developed SSB model, an average current mode control is implemented in the second part of the work. Unlike the existing methods of current mode control, in the proposed scheme, the current reference is estimated without using the dc-link current sensor, which is verified experimentally.The SSB-based existing topologies, though promising for many applications, are not realised with minimum switch counts. As opposed to four switch H-bridge-based buffer converter, two switch-based series capacitor stacked buffer converter topologies are synthesised in this part of the work. The generalised topology synthesis procedure and control challenges are identified. One of the proposed two-switch-based topologies named Series Capacitor Boost Hybrid Filter (SC-BOHF) is implemented and verified experimentally.Apart from the active solutions, an alternative dc bus filter structure, consisting of a combination of an inductor (L) and capacitor (C), tuned at the second harmonic (2ω) frequency, reduces the capacitance requirement, enhancing the likelihood of deployment of film capacitors. The proposed solid-state tuning restorer (SSTR) offers consistent filtering performance of the LC filter under frequency and parameter variations. As per the tuning requirement of the LC filter, SSTR acts as an electronic inductor or capacitor. It also ensures a graceful degradation in the filter characteristics during SSTR converter failure modes. The evolution of the SSTR configuration, analysis of its VA rating, and control requirements are studied in this work.The realisation that SSTR requires to behave as an electronic inductor and capacitor as per the sense of LC filter detuning motivated this part of the work, where a unified active capacitor and inductor (UACI) is proposed and implemented without using any dc capacitor. Conventionally, an H-bridge-based active capacitor or inductor requires large dc capacitances to ensure satisfactory current THD. In the proposed configuration, a dc capacitor-less three-leg converter topology is proposed to emulate a two-terminal unified active capacitor and inductor. Based on the current reference, the proposed configuration emulates inductive or capacitive characteristics and smoothly transits from one characteristic to another. The operation of the proposed UACI is studied, and a closed-loop control scheme is developed.All the proposed methods are validated on hardware prototypes that have been developed as a part of the work. —————— ALL ARE WELCOME —————

Provisional Research Admission Results 2023
2023-06-21 16:30 - 2023-07-06 22:30
Provisional research admission results 2023
Provisinal Result reserch 2023

[CPRI Chair Talk] Prof Sukumar Brahma on 26th June 2023 at 11 am at MMCR, EE Dept
2023-06-26 16:30 - 18:30 | MMCR, Hall C 241, 1st floor, EE department
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Title: Source-Agnostic, Inherently Directional Time-Domain Distance Relay
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Abstract:
There have been reported instances of legacy numerical distance relays failing to identify fault direction when they are fed by an inverter based resource (IBR) – solar, wind or storage. This is largely because the response to fault from an inverter is radically different than the fault response of a traditional synchronous machine. This presentation will explain the reasons for misoperations and introduce design, implementation, testing and validation of a distance relay designed in time domain which avoids polarization problems in numerical legacy relays that operate in phasor domain. It will also report superior performance of the proposed relay when compared to the only time-domain distance relay in the market that operates based on travelling waves.

Bio:
Sukumar Brahma received his Bachelor of Engineering from Gujarat University in 1989, Master of Technology from Indian Institute of Technology, Bombay in 1997, and PhD in from Clemson University in 2003; all in Electrical Engineering. He joined Clemson university as the Dominion Energy Distinguished Professor of Power Engineering in August 2018. He also serves as the director of the industry-funded Clemson University Electric Power Research Association (CUEPRA). Before joining Clemson he was William Kersting Endowed Chair Professor at New Mexico State University, USA. Dr. Brahma has chaired IEEE Power and Energy Society’s Power and Energy Education Committee, Life Long Learning Subcommittee and Distribution System Analysis Subcommittee. He is a member of the Power System Relaying and Control Committee (PSRCC), where he has been contributing to and leading working groups that produce reports, guides and standards in the area of power system protection. He has been an editor for IEEE Transactions on Power Delivery, and served as Guest Editor-in-Chief for the Special Issue on Frontiers of Power System Protection for the journal. His research, widely published and funded by the National Science Foundation, US Department of Energy, utilities, and other government agencies has focused on different aspects of power system modeling, analysis, and protection. Fundamentally, it spans across diverse areas of electrical engineering and computer science, integrating signal processing, machine learning, control and communication to holistically approach the emerging problems in the power and energy domain. Current research, funded by the US Department of Energy, investigates and addresses protection and fault location issues in integration of renewables with power systems and develops new paradigms in protection of smart grid, at both transmission and distribution levels.

Dr. Brahma is a Distinguished Lecturer of the IEEE and CPRI Visiting Chair Professor at IISC in 2022-23. He has been elected IEEE Fellow “for contributions to power system protection with distributed and renewable generation”.

[EE Seminar] - Prof. Saikat Chatterjee, KTH - {Data-driven Non-linear State Estimation of Model-free Process in Unsupervised Learning}, Friday, June 30th, 11am, MMCR, EE.
2023-06-30 11:00 - 13:00
The IEEE Signal Processing Society, Bangalore Chapter, and the Electrical Engineering, IISc are happy to host the following talk,

Venue : MMCR (C241), EE, IISc
Time : 11am-12noon
Date : 30-June-2023
Speaker : Prof. Saikat Chatterjee (KTH)

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Title: DANSE: Data-driven Non-linear State Estimation of Model-free Process in Unsupervised Learning Setup
Abstract:
We address the tasks of Bayesian state estimation and forecasting for a model-free process in an unsupervised learning setup. In the seminar, we discuss our new method called DANSE – Data-driven Nonlinear State Estimation method. DANSE provides a closed-form posterior of the state of the model- free process, given linear measurements of the state. In addition it provides a closed-form posterior for forecasting. We show how data-driven recurrent neural networks (RNNs) are used in the DANSE to provide closed-form prior of the state and posterior. The training of DANSE, mainly learning the parameters of RNN, is executed in an unsupervised learning approach. In unsupervised learning, we have access to a training dataset consisting of only a set of measurement data trajectories, but we do not have any access to the state trajectories. Therefore, DANSE does not have access to state information in training data and can not use supervised learning. Using simulated linear and non- linear process models (Lorenz attractor and Chen attractor), we evaluate the unsupervised learning- based DANSE. We show that the proposed DANSE, without knowledge of the process model and without supervised learning, provides a competitive performance against model-driven methods, such as Kalman filter (KF), extended KF (EKF) and unscented KF (UKF), and a recently proposed hybrid method called KalmanNet.
Preprint of the paper: https://arxiv.org/abs/2306.03897
Bio:
Saikat Chatterjee is associate professor at School of Electrical Engineering and Computer Science, KTH-Royal Institute of Technology, Sweden. He received a Ph.D. degree from Indian Institute of Science, India. His website: https://www.kth.se/profile/sach

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​All are welcome,

IEEE PES Talk: Prof. Satyajayant Misra, 10-07-2023, Monday 3PM - 4PM, MMCR, EE
2023-07-10 15:00 - 17:00 | MMCR, Hall C 241, 1st floor, EE department
Title: An Information-Centric Network Architecture for DDoS Protection in the Smart Grid

Time and Time: 3 PM – 4 PM, Monday, 10 July 2023

Venue: MMCR, EE, IISc

Abstract: With the proliferation of differently-abled and heterogeneous devices in the smart grid Denial of Service (DoS) is becoming an even more potent attack vector than it was before. We demonstrate the ease with which an adversary can orchestrate DoS and distributed DoS (DDoS) attacks on the grid. In this talk, we will discuss our proposed architecture iCAD–an information-centric network architecture, and our prior architecture iCAAP, on which iCAD is built. We discuss our architecture in detail and demonstrate the architecture and the mitigation technique’s effectiveness in mitigating significant DoS/DDoS attacks.

Bio: Dr. Satyajayant Misra (Jay) is a professor of computer science and electrical and computer engineering at New Mexico State University (NMSU). He is also the associate dean of research for the College of Engineering. His research expertise is in cybersecurity and computer networking and his recent research interests are in edge computing, future Internet, the smart grid, cryptocurrencies, and decentralized finance. He has over 100 peer-reviewed publications in several prestigious venues, such as ACM CCS, IEEE/ACM Transactions on Networking and Mobile Computing, IEEE/ACM Supercomputing Conference, and IEEE Transactions on Intelligent Transportation Systems. His research has garnered over 7700 international citations and he has an h-index of 26 and an i-10 index of 60. His research has been supported by Intel Labs, US NSF, DoD, DoE, DoEd, and the FAA, and national labs such as Sandia National Lab, LANL, and Idaho National Lab.

M.Tech.(Res.) Thesis Defense of Vishwabandhu Uttam
2023-07-11 15:00 - 17:00 | MMCR, Hall C 241, 1st floor, EE department
Title: A Unified Modeling Approach for Design and Performance Improvement of Triple Active Bridge Converter
Name of the Student: VISHWABANDHU UTTAM, M.Tech (Res) in Electrical Engineering

Research Supervisor: Vishnu Mahadeva Iyer
External Examiner: Anirudh Guha, Assistant Professor, IIT Palakkad

Date/Time: 11th July 2023, Tuesday at 3:00 PM
Location: MMCR (Electrical Engineering)

Abstract:Triple Active Bridge (TAB) converter is a multi-port DC-DC converter. This converter is an extension of the popular Dual Active Bridge converter. It features desirable traits of the DAB converter, such as high-power density, galvanic isolation, and bi-directional power flow between any of the ports. As in other multi-port converters, redundant power conversion is minimized through component sharing among the ports in a TAB converter. All the switches in a TAB converter can undergo soft switching over a wide range of operating points, reducing switching losses and the size of auxiliary components. The multiple degrees of freedom in modulating a TAB converter offer several design and operational flexibilities.However, this converter has yet to come into the limelight despite these advantages. One of the reasons is the lack of a unified analytical framework for the design and operation of this converter. The existing models for the TAB converter are limited in scope and cannot be easily used for the design and operational optimization of the converter. This work focuses on developing simple, unified models for analyzing the TAB converter.
The popular First Harmonic Approximated (FHA) large-signal and small-signal models are evaluated to understand their limitations. Improved large-signal and small-signal Generalised Harmonic Models (GHM) are developed by incorporating the impact of higher-order harmonics. While the GHM is shown to be superior for small-signal analysis of the converter, it is not suitable to analyze the soft-switching bounds of the TAB converter. To overcome the limitations of GHM, a Unified Model that incorporates the impact of the magnetising inductance of the three-winding transformer is proposed. The Unified Model can accurately predict the AC port currents at the switching instants and is used to study the soft-switching bounds of the TAB converter. The GHM and Unified Model are validated through extensive switching circuit simulations and experimental results from a 1 kW hardware prototype developed in the laboratory. Further, a new design algorithm for the TAB converter is proposed. The proposed algorithm leverages the FHA model’s simplicity and the Unified Model’s accuracy. Finally, a new modulation scheme based on Penta Phase Shift with five degrees of freedom is proposed to achieve soft switching across the operational range of the TAB converter.

We request your presence at the thesis defense.
All are welcome.

[Oral Examination Talk] - A Learnable Distillation Approach For Model-agnostic Explainability With Multimodal Applications, {Debarpan, EE} [MMCR, EE, 11:00AM, July 12]
2023-07-12 11:00 - 13:00
Title: A Learnable Distillation Approach For Model-agnostic Explainability With Multimodal Applications
Venue: MMCR, C241, EE, IISc, and also in the Teams Link

Date and Time: July 12, 11:00AM.

Speaker: ​ Debarpan Bhattacharya, MTech (Res) EE, IISc

Abstract:
Deep neural networks are the most widely used examples of sophisticated mapping functions from feature space to class labels. In the recent years, several high impact decisions in domains such as finance, healthcare, law and autonomous driving, are made with deep models. In these tasks, the model decisions lack interpretability, and pose difficulties in making the models accountable. Hence, there is a strong demand for developing explainable approaches which can elicit how the deep neural architecture generates the output decisions.
The current frameworks for explainability of model learning are based on gradients (eg. GradCAM, guided-gradCAM, Integrated gradients etc) or based on locally linear assumptions (eg. LIME). Some of these approaches require the knowledge of the deep model architecture, which may be restrictive in many applications. Further, most of the prior works in the literature highlight the results on a set of small number of examples to illustrate the performance of these XAI methods, often lacking statistical evaluation. This talk proposes a new approach for explainability based on mask estimation approaches, called the Distillation Approach for Model-agnostic Explainability (DAME). The DAME is a saliency-based explainability model that is post-hoc, model-agnostic, and applicable to any architecture/domain. The DAME is a student-teacher modeling approach, where the teacher model is the original model for which the explainability is sought, while the student model is the mask estimation model. The input sample is augmented with various data augmentation techniques to produce numerous samples in the immediate vicinity of the input. Using these samples, the mask estimation model is learned to learn the saliency map of the input sample for predicting the labels. A distillation loss is used to train the DAME model, and the student model tries to locally approximate the original model. Once the DAME model is trained, the DAME generates a region of the input (either in space or in time-domain for images and audio samples, respectively) that best explains the model predictions.
We also propose an evaluation framework, for both image and audio tasks, where the XAI models are evaluated in a statistical framework on a set of held-out of examples with the Intersection-over-Union (IoU) metric. We have validated the DAME model for vision, audio and biomedical tasks. Firstly, we deploy the DAME for explaining a ResNet-50/ViT classifier pre-trained on ImageNet dataset for the object recognition task. Secondly, we explain the predictions made by ResNet-50 classifier fine-tuned on Environmental Sound Classification (ESC-10) dataset for the audio event classification task. Finally, we validate the DAME model on the COVID-19 classification task using cough audio recordings. In these tasks, the DAME model is shown to outperform existing benchmarks for explainable modeling.

​
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All are welcome

[PhD Colloquium of Akshara Soman, EE on 14/7, 11AM] {Investigating Neural Encoding of Word Learning and Speech Perception}
2023-07-14 11:00 - 13:00 | MMCR, Hall C 241, 1st floor, EE department
Dear All,
Inviting you to the PhD Thesis Colloquium talk with the following details.

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Speaker: Ms. Akshara Soman

Title: Investigating Neural Encoding of Word Learning and Speech Perception

Date & Time : 14-7-2023, 11:00AM
Venue : MMCR (C241), EE, IISc

Research Supervisor: Prof. Sriram Ganapathy, EE.

=================================================================ABSTRACT
Language learning and speech perception are remarkable feats performed by the human brain, involving complex neural mechanisms that allow us to understand and communicate with one another. Unravelling the mysteries of these mechanisms has far-reaching implications, from theories of human cognition to developing effective language learning strategies and advancing speech technology. By employing a multidisciplinary approach encompassing neural investigations using EEG signals, behavioral analyses, and machine learning perspectives, this talk sheds light on the underlying processes involved in word learning and speech perception.

The talk is divided into three parts. The first part begins by examining how an imitation based learning of foreign sounds is captured in the EEG signals. In this listen and reproduce setting, subjects were introduced to words from a foreign language (Japanese), and English. The subjects were also asked to articulate the words. The results show that time-frequency features and phase in the EEG signal contain information for language discrimination. Further analysis showed that speech production improved over time, and the frontal brain regions were involved in language learning. These findings suggest the potential of EEG for personalized language exercises and for assessing learners’ abilities.

The next part of the talk investigates how learning patterns change when semantics are introduced and presented in a sentence context. The participants listen to Japanese words in an English sentence, once before understanding the semantics of these words and later with the semantic exposure. We quantify the learning patterns in the EEG signal. Notably, a delayed P600 component emerges for Japanese words, suggesting short-term memory processing unlike the N400 typically seen for incongruent words in the known language. The brain regions associated with semantic learning are also identified in this study using the EEG data.

In the final part of the talk, we analyze the neural mechanisms of human speech comprehension using a match-mismatch classification of the continuous speech stimulus and the neural response (EEG). We make three major contributions on this front – i) Illustrate the role of word-boundaries in continuous speech comprehension for the first time, ii) Elicit the encoding of speech data (acoustics) as well as the text data (semantics) in the EEG signal, and, iii) Increased signature of semantic content (text) in the EEG data in acoustically challenging environments of dichotic listening. The findings have potential applications for understanding speech recognition in noise, brain-computer interfaces, and attention studies.

In summary, the talk will attempt to enhance our understanding of language learning, speech comprehension, and the neural mechanisms involved.
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ALL ARE WELCOME

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Ph.D. Thesis Colloquium
2023-07-19 14:30 - 17:00
Colloquium Announcement

Candidate’s Name : BABY SINDHU A V
Degree Registered : Ph.D.
Date & Time : 19th July 2023 @ 2.30 PM
Venue : Seminar Hall, High Voltage Lab and in the Teams Link
Title : Development of Polymeric Nano/Micro Composite Insulation with
Better Performance for Various High Voltage Power Applications

Abstract

The demand for electrical power is increasing day by day necessitating a higher voltage level for power transmission and the development of high speed rails , electric vehicles, more electric aircrafts and all electric ships demand for improvement in electric motor capacity in those vehicles. Also the use of cast resin type dry transformers in high moisture area and confined area is increasing since it is more reliable in extreme conditions and also they require less maintenance. All these applications demand for better insulating materials which can address all the above issues cost effectively. In recent years, the use of polymeric insulating material in HV power apparatus is increasing. Hence this study focuses on the development of polymeric composite insulating material for various electrical power applications.
Silicone rubber is a preferred material for use as weathershed material in outdoor polymeric insulators used in high voltage power transmission lines. The tracking & erosion on the insulator surface due to the electrical discharges and corona cutting of the insulator surface are the main issues related to outdoor polymeric insulators and these are addressed in this study. Tracking and erosion performance of silicone rubber filled with nano/micro fillers of different loadings is analysed using Inclined Plane Test (IPT) as per IEC 60587. A computational study on the behavior of the samples subjected to tracking is also done and the same is verified with the experimental results obtained in this work. Corona ageing studies are done by ageing the samples in a corona chamber for 25 hours. Hydrophobicity changes, crack width formation and erosion performance after corona ageing are evaluated. An effort is made to correlate the value of leakage current to the eroded mass and a reliable online condition monitoring tool is also developed as a part of the thesis work.
Again, epoxy is extensively used in many electrical power apparatus such as ground wall insulation of the high voltage rotating machines, as spacer material in Gas Insulated Substations (GIS), as solid insulation in dry type transformers etc. Heat dissipation is an important area of concern when using epoxy as ground wall insulation in rotating machines and as an insulation in cast resin dry type transformer. The performance of epoxy filled with nano/ micron sized fillers are investigated in this study in terms of their heat removal capacity and at the same time retaining their dielectric properties. The improvement in thermal conductivity is correlated with the performance of various composites developed. The formation of track in the ground wall insulation and the failure of the machine is a major issue as far as rotating machines are considered. Hence the tracking time of various epoxy composites are observed and compared. The initiation of a faint track on the surface of the insulator is monitored with the help of a ratio of third harmonic component to the fundamental component. This ratio can be used as an efficient condition monitoring tool for rotating machines by measuring the leakage current online.
In summary polymeric composite insulating materials based on silicone rubber and epoxy with different fillers and loadings and having better electrical and thermal performance than the conventional materials are developed in this study.

All are welcome

Meeting link

A 3 Day workshop on electric vehicle power train design on 20 21 22 July 2023
2023-07-20 09:00 - 2023-07-22 17:30
A 3 Day workshop on electric vehicle power train design on 20 21 22 July 2023 at Dept of EE IISc.
The link for workshop :
http://www.nwevtech.com
Poster: IISc EE EV workshop poster

[PhD Colloquium Talk by Prachi Singh] - 21-7 in MMCR, EE @ 330-430pm {Graph Clustering Approaches for Speaker Diarization of Conversational Speech}
2023-07-21 11:00 - 13:00 | MMCR, Hall C 241, 1st floor, EE department
Dear All,

We are pleased to invite you to the following PhD colloquium talk,

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Who: Ms. Prachi Singh, PhD candidate, EE.

When: 21/7/2023 at 11AM [Note the updated the time]. High Tea at 1045am

Where: MMCR, EE, IISc and in the Teams Link

What: Graph Clustering Approaches for Speaker Diarization of Conversational Speech

Abstract
In this era of advanced machine intelligence, real-world speech applications need to be equipped to deal with conversations involving multiple speakers. An essential first step in speech information extraction from conversational speech is the task of finding “who spoke when”, also referred to as speaker diarization. The focus of this talk is to describe our efforts in investigating graph clustering techniques for this problem. While graph models have been used in several other domains, its application to temporal segmentation of speech is the first of its kind.

The talk is divided into three main parts. In the first part of this talk, I will describe a novel proposal on self-supervised learning to perform joint representation learning and clustering, called self-supervised clustering (SSC) for diarization. On the learned representations, we explore path integral clustering (PIC), a graph-based clustering algorithm. The PIC is an agglomerative graph clustering method that performs clustering based on the edge connections of a node, called path integral. The proposed SSC with path integral clustering (SSC-PIC) is shown to achieve state-of-the-art performance for benchmark datasets.

The second part of the talk is an extension of SSC-PIC to incorporate metric learning. We design a neural version of the probabilistic linear discriminant analysis (PLDA) approach with learnable parameters to compute a log-likelihood score between embeddings from two segments of the recording. We propose a joint self-supervised representation learning and metric learning approach called Selfsup-PLDA-PIC.

In the third part of the talk, we introduce an end-to-end supervised graph clustering approach. We develop a supervised learning setup using labeled conversational data for training this model. In this setting, we propose a supervised clustering approach called Supervised HierArchical gRaph Clustering (SHARC) for speaker diarization. This approach uses Graph Neural Networks (GNN) to capture the similarity between the speaker embeddings and perform hierarchical clustering. An extension of this work is the joint training of the speaker embedding extractor along with the GNN module, referred to as end-to-end SHARC (E-SHARC). To incorporate overlapped speech detection, I will illustrate how to extend the E-SHARC model for diarization of overlapped speech recordings.

The talk will conclude with a summary of our key contributions, while highlighting the pros and cons of using graph-based models for speaker diarization.

==========================

All are welcome

PhD Thesis Colloquium of student, Kamisetti Prasad
2023-07-26 09:00 - 23:00 | MMCR, Hall C 241, 1st floor, EE department
PhD Thesis Colloquium
Title: “Modeling, Design and Control of Power-Electronic-Actuated Electromagnetic Bearings”
Speaker: Kamisetti N V Prasad,
Department: Electrical Engineering
Supervisor: Prof. G. Narayanan
Date and Time: 26 July 2023 (Wednesday), 9 am – 10 am
Venue: MMCR, EE Department
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Abstract
Many practical electrical machines, turbines, and compressors operate in speeds, ranging from tens of thousands of rpm to hundreds of thousands of rpm, and also, handling a significant amount of power. While high-speed operation reduces the machine dimensions for a given power rating, its challenges include high bearing loss, reduced bearing life, and high viscous drag. Contactless bearings, such as gas, oil, or electromagnetic bearings (EMB), offer longer life than conventional bearings in high-speed applications. In addition to being contactless, an electromagnetic bearing (EMB) is lubrication-free; hence this is suited for both clean conditions (e.g., food and pharmaceutical industry) and hazardous applications (e.g., petroleum and chemical industry). This thesis presents the modelling, analysis, design and control of power-electronic-actuated EMBs. The scope of thesis includes both radial EMB and axial (or thrust) EMB, which handle the radial and axial forces, respectively, acting on the rotor assembly.
Drawing from the switched reluctance machine (SRM) literature, a flux linkages-based modelling approach is proposed for radial and axial EMB. The flux-linkage characteristics can be obtained through either numerical simulation or measurement, and can be used to generate the force vs current vs displacement characteristics of the bearing. Such modelling includes the effects of magnetic saturation, leakage flux and fringing. An improved design procedure is proposed, which guarantees linear force characteristics along with the desired maximum force. A radial EMB and an axial EMB are designed for load capacities of 180 N and 1600 N, respectively, using the improved design procedure and are validated using finite element analysis tools. Further, a modified geometry of the thrust bearing is proposed to reduce the thrust disc diameter (and thereby, to cater to higher rotational speeds), while maintaining the same load capacity. A systematic PID design procedure is presented for the position control of the EMB, guaranteeing the required stability margins. The performance of this controller is validated through simulations using detailed models of EMB.
Position control of the EMB, which is an unstable system, require high-bandwidth control of the EMB coil currents. This, in turn, requires high-switching-frequency power amplifiers to feed the coils. An SiC device-based asymmetric H-bridge converter of 300V, 10 A, with a switching frequency of 50 kHz, is designed and tested. Further, the current controller is designed, and its reference tracking capability is validated experimentally for different types of current references that are expected during the EMB operation. Further, this thesis proposes a novel test rig for thrust-bearing characterization. This test rig can characterize the given thrust bearing under static and dynamic conditions (under rotation and varying loading).
—————— ALL ARE WELCOME —————

[Colloquium EE 27 Jul 2023] Dual Mode Operation of Grid-tied Inverters: Modeling, Stability Analysis, and Islanding Detection
2023-07-27 10:30 - 12:30
Dual Mode Operation of Grid-tied Inverters: Modeling, Stability Analysis, and Islanding DetectionSpeaker: SUGOTO MAULIK . of Ph.D. (Engg) in Electrical EngineeringDate/Time: Jul 27 / 10:30:00 amLocation: MMCR EE, IIScResearch Supervisor: Vinod JohnTeams link.Abstract:Increased penetration of renewable energy sources like solar PVs and wind is fundamentally altering the power flow dynamics in distribution networks. These localized forms of generation add redundancy to the power system and increase its load-handling capacity. However, these advantages come at the cost of reduced stability and altered protection requirements. These distributed forms of generation (DGs) are interfaced with the power grid via power electronic converters operating at high bandwidths compared to conventional sources. While these offer higher performance, but consequently lower the stability margins. An analytical framework is thus necessary for modeling and stability analysis of such systems. The dynamics involved in modeling a grid-tied DG system span a wide spectrum of frequencies. While simplified modeling can lead to inaccuracies, an all-inclusive model leads to an over-complicated and unintuitive model. This work proposes a systematic approach to model the behavior of 3-phase grid-tied DG systems using dynamic phasors. Dynamic phasors allow for a state-space representation of the relevant dynamics. The developed state space model is then used for the following:1. Islanding detection: Islands are formed in 3-phase distribution networks when an active distributed generation (DG) is disconnected from the grid. If undetected, the DG continues to energize its local loads leading to safety concerns. In this work, a state-feedback approach is developed for islanding detection, which places a system pole in the right half plane (RHP). This ensures the destabilization of the islanded network and a zero non-detection zone. The scheme is designed and implemented experimentally.2. Transfer of Control: Post-island detection, the DG is required to disconnect from the grid while ensuring uninterrupted power flow to its local loads. A control scheme involving a voltage control loop and grid current feed-forward is developed to achieve a fast transfer from grid-following to grid-forming mode of operation. The introduced voltage control loop ensures that rated voltage is maintained across the loads, and the grid current feed-forward is used to minimize the transients during the transfer process. The method is designed and implemented in conjunction with the islanding detection scheme and verified experimentally with local loads.3. Stability analysis of grid-tied DG systems: Owing to the formation of microgrids and weak grids in the distribution network, the stability assessment of such networks becomes essential. This assessment is performed by extending the dynamic phasor-based model for islanded systems to model grid-tied systems as well. The developed model includes the dynamics of the PLL, grid, DG current levels, and load. In addition to passive loads, considered in the relevant literature, the proposed model also incorporates the effect of constant power and constant current type power electronic loads. It is demonstrated, analytically and experimentally, that the presence of local loads has a stabilizing impact on the synchronization stability of a DG. Additionally, an upper limit on the bandwidth of power-electronic type constant power loads is derived, affirming the observation that high bandwidth loads lead to reduced system stability.All the proposed methods are validated on hardware prototypes that have been developed as a part of the work.Meeting Link :

Join conversation
teams.microsoft.com

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EE PhD Thesis Colloquium -- Francis C Joseph -- 28th July, 4 PM
2023-07-28 16:00 - 17:30 | B 303 (Old 311), Dept. of Electrical Engineering (Hybrid Mode)
Title: Parallel Algorithms for Efficient Utilization of Multiprocessor Architectures in Power System ApplicationsSpeaker: FRANCIS C JOSEPH . of Ph.D. (Engg) in Electrical Engineering under Electrical EngineeringDate/Time: Jul 28 / 16:00:00Location: Room 303, 2nd Floor, EEResearch Supervisor: Dr. Gurunath GurralaAbstract:Computer hardware capabilities have been enormously increasing over the years. Multi-core processors, graphic processing units (GPUs), and field programmable gate array (FPGA) accelerators have seen significant growth in recent years. They have opened new computational paradigms such as edge computing, fog computing, grid computing, distributed computing, cloud computing, and exascale supercomputing. However, efficient utilization of most of these computational paradigms in traditional engineering disciplines such as power engineering is very challenging. In this thesis, we develop efficient algorithms for multiprocessor-based high-performance computing and edge computing platforms for two power system applications, power system stability assessment and power quality measurements respectively.Faster than real-time transient stability assessment of large power grids using time-domain simulations with detailed models is comp utationally challenging. Today the commercial tools being used for this application in Energy Management Systems (EMS) across the world rely on parallel batch processing methods which don’t utilize the architecture of the computational paradigms efficiently. In this thesis for transient stability simulations, we explore a time parallel algorithm, Parareal in Time, which belongs to a class of temporal decomposition methods for time parallel solutions of differential equations. Two effective implementation approaches, Master Worker and Distributed, are analysed for large systems, and scaling tests are performed using a state space model with a Message Passing Interface (MPI) in a multiprocessor environment. One of the findings was that the performance of the Parareal depends on the accuracy and the computational cost of the coarse solver used for initialization and subsequent correction steps. A potential coarse solver, Modified Euler (ME), a well-known solver for transient stability simulations even in commercial packages, has been explored to adapt its step size by controlling the Local Truncation Error (LTE) to achieve the desired accuracy. An LTE estimator using a Multistage Homotopy Analysis Method (MHAM), which gives an approximate solution to a set of non-linear equations in the form of a power series, is proposed to control the LTE at each integration step to enable adaptation of the ME step size. The proposed MHAM-assisted adaptive ME solver is found to be faster with comparable accuracy when compared to the conventional fixed and adaptive Modified Euler solver for large systems transient stability simulations. Since MHAM is lighter than the ME solver and LTE estimate is sufficient for step size adaptation, an adaptive MHAM coarse solver is proposed for the Parareal. However, MHAM provides a non-zero auxiliary parameter `c’ to select a family of solutions. Hence, an optimisation framework is also proposed to select this parameter based on the system’s dynamics automatically. Based on many case studies on test systems of different sizes, it is found that maintaining the LTE lower than the Parareal convergence tolerance improves the speedup of the Master-Worker paradigm, however for the distributed implementation maintaining LTE higher than the convergence tolerance gives improved speedup. An approach to include unscheduled events which arise in power system operation due to the operation of protective relays is also proposed for Parareal.In Parareal implementation, each coarse time segment is assigned to one processor in the MPI environment. In order to improve speedup, multiple processors in a node is to be assigned to a coarse time segment. Therefore, a shared memory-based space parallel transient stability solver is also considered for further performance enhancement. Space parallelisation of transient stability simulation involves breaking the network into subnetworks and solving each part independently while ensuring the original network’s convergence. Therefore, a Multi Area Thevenin Equivalent (MATE) based parallel solver implementation on a shared memory platform is proposed in which both the space parallelisation and task parallelisation are explored. It is shown that the ideal speedup can be closely matched by the space parallelism and can be exceeded by space + task parallelism while the network is well-partitioned and it can be further improved when combined with time parallelism. The current state-of-the-art chips provide multicore architectures for edge computing applications also. One such low-cost, open-source, heterogeneous, resource-constrained hardware platform is called “Parallella”. The unique hardware architecture of the Parallella provides many edge computing resources in the form of a Zynq SoC (dual-core ARM + FPGA) and a 16-core co-processor called Epiphany. This Parallella device was used as a measurement device for edge computing applications research in smart grids which could sample 3 voltages and 4 currents at 32 kHz sampling rate. One application of such a device to measure the harmonics and compute various Power Quality (PQ) indices is explored in the thesis. In this regard, we have developed a parallel implementation of multichannel FFT on Epiphany for the streaming data. Epiphany 16-core architecture has very limited memory resources and the order in which the cores are to be accessed has a significant impact on the execution. Proper decomposition of the FFT algorithm tasks and scheduling of the tasks for efficient core and memory usage are crucial which requires a good understanding of the Epiphany architecture. The obtained PQ measurements from the proposed implementation are found to be comparable to commercial power analyser measurements.Acknowledgements: This work is funded by the • SERB Science and Technology Award for Research (SERB-STAR) grant, File No: STR/2020/000019 titled Hybrid Parallel Solvers for Faster than Real-time Transient Stability Analysis of Large Power Grids. • Bosch Research and Technology Centre, Bangalore, India and by the Robert Bosch Centre for Cyber-Physical Systems, Indian Institute of Science, Bangalore, India (under Project E-Sense: Sensing and Analytics for Energy Aware Smart Campus) • DST Young Scientist Grant DST-YSS/2015/001371, IndiaMeeting Link :

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[Thesis Defense Talk - Shreyas Ramoji, 28/7 @430pm, MMCR, EE] - "Supervised Learning Approaches for Language and Speaker Recognition"
2023-07-28 16:30 - 17:30 | MMCR, Hall C 241, 1st floor, EE department
Thesis Defense Talk

Venue: MMCR, EE
Date: 28/7/2023
Time: 4:30pm [High Tea at 4:15pm]
Speaker: Shreyas Ramoji

Title: Supervised Learning Approaches for Language and Speaker Recognition

Abstract:
In the age of artificial intelligence, one of the important goals of the speech processing research community is to enable machines to automatically recognize who is speaking and in what language.

In the first part of this talk, I will discuss our efforts towards a supervised version of the generative model based embedding extractor for speaker and language recognition. We call the embeddings from this supervised approach as s-vectors. In this approach, a database of speech recordings (in the form of a sequence of short-term feature vectors) is modeled with a Gaussian Mixture Model, called the Universal Background Model (GMM-UBM). The deviation in the mean components is captured in a lower dimensional latent space, called the i-vector space, using a factor analysis framework. In our research, we propose a fully supervised version of the i-vector model, where each label class is associated with a Gaussian prior with a class-specific mean parameter. The joint prior (marginalized over the sample space of classes) on the latent variable becomes a GMM. With detailed data analysis and visualization, we show that the s-vector features yield representations that succinctly capture the language (accent) label information and also perform significantly improved the recognition of various accents of the same language.

In the second part of the talk, I will discuss our efforts for the problem of fully supervised end-to-end speaker verification, where a binary decision has to be made whether a pair of recordings belong to the same speaker or not. We proposed a neural network approach for back-end modeling, where the likelihood ratio score of the generative probabilistic discriminative analysis (PLDA) model is posed as a discriminative similarity function, and the learnable parameters of the score function are optimized using a verification cost. The proposed model, termed as neural PLDA (NPLDA), is initialized using the generative PLDA model parameters. The loss function for the NPLDA model is an approximation of the minimum detection cost function (DCF) used as one of the evaluation metrics in various speaker verification challenges. The speaker recognition experiments using the NPLDA model are performed on the speaker verification task in the VOiCES datasets as well as the SITW challenge dataset. Further, we explore a fully neural approach where the neural model outputs the verification score directly, given the acoustic feature inputs. This Siamese neural network (E2E-NPLDA) model combines embedding extraction and back-end modeling into a single processing pipeline. Several speaker recognition experiments were performed on benchmark datasets where the proposed N E2E-NPLDA models are shown to improve significantly over the then state-of-art system.

I will conclude the talk by highlighting some of the noteworthy approaches that were published during the course of this research work, and identifying some important research directions related to this thesis that can be pursued in the future.

Bio:
Shreyas Ramoji is a Research Associate at the Learning and Extraction of Acoustic Patterns (LEAP) Laboratory, Department of Electrical Engineering, Indian Institute of Science, Bengaluru. He obtained his Bachelor of Engineering degree from the Department of Electronics and Communication Engineering, PES Institute of Technology, Bangalore South Campus. His research interests include speaker and language recognition, diarization, representation learning for multilingual and conversational speech, ML/AI applied to healthcare and the environment, natural language processing, explainability and interpretability of neural networks, and neuro-symbolic AI.

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Time Forecasting of COVID-19 Signals: Challenges and Model Development
2023-07-31 16:00 - 17:30 | MMCR, Hall C 241, 1st floor, EE department
Title: Real-Time Forecasting of COVID-19 Signals: Challenges and Model Development
Speaker: Dr. Aniruddha Adiga, Research Scientist, Biocomplexity Institute at the University of Virginia
Host Faculty: Prof. Chandra Sekhar Seelamantula, EE, IISc
Venue: Multimedia Classroom (MMCR), Department of Electrical Engineering, Indian Institute of Science
Date & Time: July 31, 2023; 4 PM onward (Coffee will be served during the talk)
Abstract:
COVID-19 is the largest pandemic the world has seen with approximately 700 million confirmed cases, 8 million confirmed deaths pandemic to date, and unprecedented social, economic, and political impact. During the pandemic, we also observed an extensive development of computational and mathematical models to aid policymakers and response efforts. An essential use of such models is in early warning systems and forecasting of COVID-19 signals. Real-time forecasting of COVID-19 signals is a challenging problem due to data quality issues, nonstationarity of time series, evolving targets, behavioral adaptations, etc. It has been observed that under such circumstances, ensemble models consisting of a diverse set of model classes are a better choice than individual models.
In this talk, I will discuss our efforts toward the development of an ensemble model consisting of statistical, deep learning, and compartmental models and our participation in national-level collaborative forecasting efforts. Through these efforts we have observed that all classes of models are important, however, different model classes performed differently during various phases of the pandemic. Armed with this understanding, I will present a modification to the ensembling method to employ this phase information and use different weighting schemes for different phases to produce improved forecasts. However, predicting the phases of the time series is another challenge, especially when behavioral and immunological adaptations govern the evolution of the time series. I will discuss a phase prediction algorithm that employs auxiliary datasets and transfer entropy techniques. We evaluate our model’s performance with other models in the collaborative effort.
Biography of the speaker:

Aniruddha Adiga is a research scientist at the Biocomplexity Institute at the University of Virginia. His interests are in signal processing and machine learning with a current focus on the development of forecasting models. From May 2018 to May 2019, he was a postdoctoral associate at North Carolina State University. He received his PhD from the Department of Electrical Engineering at the Indian Institute of Science. Aniruddha has published in top venues such as KDD, AAAI, IJCAI, BigData, etc. His paper in IEEE BigData 22 received the “Best Paper” award. His work also supports public health agencies such as the US CDC, EU CDC, and the Virginia Department of Health.

Technically co-sponsored by IEEE Signal Processing Society, Bangalore Chapter

Technical Talk by Dr. Amristanshu Pandey, University of Vermont, USA
2023-08-03 15:00 - 17:00 | MMCR, Hall C 241, 1st floor, EE department
IEEE PES Student Branch Chapter, IISc has organized a technical talk on 3rd August 2023 at 3 PM IST. Please find the talk details as below.

Title: Homotopy-based Circuit-theoretic Optimizations for Power Grids

Speaker: Dr. Amritanshu Pandey, University of Vermont, USA

Date and Time: 3rd August 2023, 3 PM ISTVenue: MMCR Electrical Engineering Department, IISc, Bengaluru.

Abstract: Optimizations are at the center of many power grid analyses. With rapid decarbonization and electrification, the scale and complexity of these optimizations are increasing. Current state-of-the-art tools for nonconvex optimization are not always robust at solving these emerging power grid problems. In this talk, I will discuss a novel domain-focused circuit-theoretic optimization method for power grids. In this approach, the first-order optimality conditions for an optimization problem are mapped into a set of equivalent circuits, the response for which represents a problem’s stationary point. As these equivalent circuits are large and highly nonlinear, we developed and used a novel homotopy method: Incremental Model Building (IMB). I will cover this homotopy in this talk and show that this method can also be extended to optimize for discrete control variables in the grid. I will conclude the talk by showing pertinent results and comparisons against a state-of-the-art method that won the recent ARPA-E grid optimization challenge.

Speaker Bio: Amrit Pandey is an Assistant Professor in the Electrical and Biomedical department at the University of Vermont with a courtesy appointment in the Electric and Computer Engineering and Engineering and Public Policy departments at Carnegie Mellon University. His overarching research goal is to develop electric energy system technologies to help combat climate change while modernizing the underlying system. In the past, he and his team developed a novel circuit-theoretic simulation and optimization framework for power grids. The project culminated in a new grid analytics tool: Simulation of Unified Grid Analysis and Renewables (SUGAR), which Pearl Street Technologies, Inc. has since commercialized. This work has won several best paper awards, including two best-of-the-best paper awards at IEEE PES General Meeting in 2017 and 2021. His current research focuses on developing computational methods that address problems in the space of large-scale grid simulation and optimization, grid cybersecurity, and energy inequity.
