BEGIN:VCALENDAR
VERSION:2.0
PRODID:-//EE - ECPv5.10.0//NONSGML v1.0//EN
CALSCALE:GREGORIAN
METHOD:PUBLISH
X-WR-CALNAME:EE
X-ORIGINAL-URL:https://ee.iisc.ac.in
X-WR-CALDESC:Events for EE
BEGIN:VTIMEZONE
TZID:Asia/Kolkata
BEGIN:STANDARD
TZOFFSETFROM:+0530
TZOFFSETTO:+0530
TZNAME:IST
DTSTART:20210101T000000
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTART;TZID=Asia/Kolkata:20211223T153000
DTEND;TZID=Asia/Kolkata:20211223T163000
DTSTAMP:20260420T112014
CREATED:20211221T011203Z
LAST-MODIFIED:20211221T011411Z
UID:239439-1640273400-1640277000@ee.iisc.ac.in
SUMMARY:PhD Thesis Colloquium of Shamibrota Kishore Roy
DESCRIPTION:Title: Characterization and Modelling of Switching Dynamics of SiC MOSFETs \nName of the Advisor: Dr Kaushik Basu \nDate and Time: 23rd December 2021\, 10:00 AM \nPlace: Offline (MMCR EE\,) online: Meeting Link: Click here to join the meeting \nAbstract: Silicon Carbide (SiC) MOSFET is a wide bandgap (WBG) power device commercially available in the voltage range of 600-1700V. With superior switching\, conduction\, and thermal performance\, it is in close competition with the state-of-the-art Si IGBTs in this voltage range. \nIn power electronic converters\, semiconductor devices operate as switches. They can be turned on or off using a control signal. Unlike ideal switches\, practical devices require a finite amount of time to transit between on and off states. This is termed as switching transient. Non-zero finite product of voltage and current during switching transient results in switching loss. Characterization and modelling of switching dynamics help gain insight into the switching process and estimate switching loss. Estimated loss can be used to determine switching frequency and selection of power devices. Also\, switching dynamics is strongly impacted by the device and circuit parasitics. Insight into the switching process helps in the proper design of gate driver and power circuit layout. \nThe switching transient of SiC MOSFET is fast compared to its Si counterpart\, resulting in reduced switching loss. However\, it excites device and circuit parasitics that may lead to prolonged oscillations\, spurious turn on\, high device stress\, EMI-related issues\, Etc. The nonlinearity of the device characteristics and impact of circuit parasitics makes the switching transient of SiC MOSFET more involved than its Si counterpart. So\, the characterization and modelling of switching dynamics of SiC MOSFET are essential. \nExperimental\, simulation and analytical approaches are used to study the switching dynamics and estimate switching loss. The experimental approach is inaccurate\, requires expensive measurement set-ups\, and is not suitable for the early stages of power converter design. The behavioural modelling approach is a widely used simulation-based approach (i.e.\, Spice simulation) where the circuit-based model of the device is used along with lumped parameter model of the external circuit. These models are simple and can capture the switching transient with sufficient accuracy. However\, it does not provide insight into the switching process\, and applying it for a large set of devices and operating conditions will be time-consuming. The analytical model belongs to another class of switching transient models. It is based on the simplified approximate solution of a set of coupled non-linear differential equations obtained from the behavioral model and results in analytical closed-form solutions or reduced order coupled non-linear equations. This model is computationally efficient and can be implemented easily in freely available programming platforms such as C or Python. Also\, the parameters required for analytical models can be obtained from the device datasheet. This modelling approach is beneficial at the early stages of the converter design when switching loss and junction temperature need to be evaluated over several operating points for many available devices from different manufacturers. This work focuses on developing analytical models. \nThe first part of the work proposes an analytical model to capture the switching dynamics (turn on and off) of SiC MOSFET. In the existing literature\, simplified modelling of channel current and device capacitances were used\, resulting in underestimating switching transition time and loss. On the contrary\, the proposed approach considers the detailed non-linear model of channel current and device capacitances along with circuit parasitics. It accurately estimates transition time\, switching loss\, (dv/dt)\, (di/dt)\, and transient over-voltage. \nIn soft switched converters (i.e.\, DAB)\, hard turn on is avoided by the converter operation\, and the switching loss is solely dictated by the turn off loss. The addition of external capacitance across the device prolongs the voltage rise period and reduces overlap between voltage and current during turn off transient. This is termed as zero voltage switching (ZVS). However\, the selection of external capacitance is not straightforward. A large external capacitance reduces switching loss\, (dv/dt)\, (di/dt)\, and transient over-voltage but may also result in higher dead-time loss and reduced switching frequency. Also\, this may lead to partial soft switching for light load conditions if the dead-time is not sufficient. In this work\, an analytical model to capture capacitor-assisted turn-off switching transient is also presented where the detailed non-linear modelling of the SiC MOSFET is used. This leads to a better estimation of switching transition time\, actual loss\, (dv/dt)\, (di/dt)\, and transient over voltage. Also\, a step-by-step design procedure of the optimal external snubber capacitor was proposed. It ensures the soft-switching condition is satisfied\, and the maximum (dv/dt) rate is within a predefined limit for a specified DC bus voltage and range of load currents. This procedure also helps in the selection of proper dead-time to avoid partial soft-switching conditions. \nDouble pulse test (DPT) based experimental measurement is used to first validate the behavioural model. Then\, the behavioural model is used to verify the correctness of the proposed analytical models. This indirect verification approach is necessary as it is not possible to measure the actual switching loss directly from the experimental measurements. Two 1.2-kV SiC MOSFETs of different current ratings are used for validation. It has been observed that there can be a significant difference between the experimentally measured switching loss and actual loss\, and the difference is more prominent for low external gate resistances. Also\, the turn off loss of SiC MOSFET is small compared to the turn-on loss. \nFast switching transient of SiC MOSFET is significantly impacted by circuit parasitics. Circuit parasitic inductances are dependent on both device package (device lead\, wire bond etc.) and circuit layout (PCB layout)\, whereas circuit parasitic capacitances are contributed solely by the circuit layout. Proposed switching transient models require circuit parasitics as input\, and the values are not usually available in the device datasheet. Measurement is the only way to accurately estimate some device package-dependent circuit parasitics when the internal package geometry is unknown. In this context\, a set of simple measurement techniques are proposed to determine important circuit parasitics necessary for switching dynamics study. The accuracy of the proposed technique is verified through behavioural simulation\, and experimental results of the hard turn off and capacitor assisted soft turn off dynamics of SiC MOSFET over a range of operating conditions for two 1.2-kV discrete SiC MOSFET of different current ratings and two different PCB layouts. Measured circuit parasitic when used in switching transient model\, correctly predicted both hard turn-off and capacitor assisted soft turn off switching dynamics over a wide range of operating conditions. \nAn interactive software based on the proposed analytical model is also developed in Python environment. The developed software takes device parameters and circuit parasitics as input and estimates transition time\, switching loss\, (dv/dt)\, (di/dt) and transient over-voltage as a function of load current. \nALL ARE CORDIALLY INVITED
URL:https://ee.iisc.ac.in/event/phd-thesis-colloquium-of-shamibrota-kishore-roy/
END:VEVENT
END:VCALENDAR